LVDS Output Driver Circuit With Common-Mode Feedback
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Solution Overview
Problem
Existing low voltage differential signaling (LVDS) technologies face challenges in achieving high communication speeds and efficient current management, particularly in maintaining stable common mode output voltage and providing short-circuit protection while operating at low voltages.
Innovation Solution
A low voltage differential signaling driver circuit is designed using a first and second differential pair of PNP transistors, transconductance stages, current sources, transresistance amplifiers, and a common mode feedback block, which includes local resistive feedback and current mirrors to control current flow and maintain stable output voltages, along with short-circuit protection mechanisms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If LVDS operates at low voltages to reduce power consumption, then energy efficiency improves, but communication speed and signal stability deteriorate
Solution Approach 1:
The patent transforms the single voltage parameter into multiple independent voltage parameters (common-mode voltage and differential voltage). By controlling these parameters separately through specific circuit topologies (differential pairs for differential voltage, feedback circuits for common-mode voltage), the system achieves low power consumption while maintaining high communication speed and signal stability.
2Use of energy by moving object
If LVDS operates at low voltages to reduce power consumption, then energy efficiency improves, but output voltage stability deteriorates
Solution Approach 1:
The patent implements feedback control circuits that continuously monitor the common-mode output voltage and adjust the bias currents accordingly. This feedback mechanism maintains stable common-mode voltage levels even under low-voltage operating conditions, preventing signal degradation while minimizing power consumption.
Solution Approach 2:
The patent independently controls the common-mode voltage parameter through dedicated feedback circuits, separating it from the differential signal path. This allows precise stabilization of the common-mode level at low supply voltages, ensuring reliable operation without excessive power draw.
3Speed
If higher currents are used to increase communication speed, then switching capability improves, but short-circuit risk and power consumption increase
Solution Approach 1:
The patent employs dynamic current control where the current magnitude is continuously adjusted based on the signaling requirements. During normal operation, optimized currents provide sufficient switching speed, while the circuit automatically reduces current under short-circuit conditions through protective feedback mechanisms, preventing damage while maintaining performance.
Data Source
AI summary
A method and apparatus for providing a low power low voltage differential signaling driver are disclosed. In an example, a low voltage differential signaling driver circuit is described, comprising a first current source to provide current to a first differential pair of PNP transistors, a pair of transresistance amplifiers driven by a corresponding pair of transconductance stages, a second current source to provide current to a second differential pair of PNP transistors, and an output port having a common mode output voltage and a differential output voltage based on a state of the first differential pair of PNP transistors and the second differential pair of PNP transistors.