LVDS Driver Circuit With Voltage-Drop Elements for Low-Voltage Signaling
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Solution Overview
Problem
As critical dimensions of transistors shrink to 14 nm or 7 nm and power supplies are lowered to 1.8 V or less, existing LVDS drivers face challenges in meeting the requirements for low voltage differential signaling, particularly in maintaining reliable and power-efficient signal transmission.
Innovation Solution
The proposed LVDS driver includes an output driver with a current source and parallel branches, each comprising switches controlled by pre-drivers, which generate switch signals to manage the differential signal flow through nodes, with voltage drop elements enhancing the voltage difference and stabilizing output impedance, allowing operation under reduced voltage ranges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If power supply voltage is lowered to 1.8 V or less to reduce power consumption, then power efficiency is improved, but the ability to maintain reliable signal transmission deteriorates
Solution Approach 1:
The patent changes the operating parameters of the LVDS driver by introducing voltage drop elements that create controlled voltage differences within the circuit. This allows the driver to maintain the required differential voltage swing for reliable signal transmission even when the overall power supply voltage is reduced to 1.8V or lower, thus resolving the contradiction between power efficiency and signal reliability
Solution Approach 2:
The voltage drop elements act as intermediaries that create localized voltage differences within the driver circuit. These intermediate voltage drops enable the switches to operate with sufficient voltage headroom for reliable switching, while the overall system operates at reduced supply voltage, thereby maintaining signal transmission reliability without sacrificing power efficiency
2Length of moving object
If critical dimensions of transistors are shrunk to 14 nm or 7 nm to increase integration density, then device miniaturization is improved, but the difficulty of maintaining LVDS requirements worsens
Solution Approach 1:
The patent compensates for the effects of transistor scaling by introducing voltage drop elements that create controlled voltage differences. This allows the LVDS driver to maintain proper switching operation and signal levels even with transistors at 14 nm or 7 nm critical dimensions, thus resolving the contradiction between device miniaturization and transmission reliability
Solution Approach 2:
The voltage drop elements serve as intermediaries that provide the necessary voltage headroom for scaled transistors to operate reliably. By creating localized voltage drops within the circuit, the patent enables proper switching operation of nanoscale transistors while maintaining overall LVDS signal integrity
3Adaptability or versatility
If power supply voltage is reduced to enable operation in advanced processes, then adaptability to advanced fabrication is improved, but the voltage headroom for transistor switching worsens
Solution Approach 1:
The voltage drop elements act as intermediaries that create localized voltage differences within the driver circuit. This provides sufficient voltage headroom for transistor switching operations even when the overall power supply voltage is reduced to match advanced process requirements, thus resolving the contradiction between adaptability to advanced fabrication and available voltage headroom
Solution Approach 2:
The patent changes the voltage distribution parameters within the circuit by introducing controlled voltage drops. This allows the system to operate at reduced supply voltages compatible with advanced processes while maintaining adequate voltage headroom for reliable transistor switching through the created voltage differences
Data Source
AI summary
A low voltage differential driver includes a first driver, a second driver, and an output driver. The output driver is configured to provide an output between a first output node and a second output node, and includes a current source, a first branch, and a second branch. The current source is configured to provide a source current. The current source is connected with a parallel arrangement of the first branch and the second branch. The first switch and the second switch are respectively controlled by a first switch circuit and a second switch circuit which together comprise the first driver. The third switch and the fourth switch are respectively controlled by a third switch circuit and a fourth switch circuit which together comprise the second driver. Each of the first to fourth switch circuits is connected between the upper node and the lower node.