LVDS Receiver Fail-Safe Circuit for Single Input Disconnects
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Solution Overview
Problem
Prior LVDS circuits fail to detect single differential input disconnects, leading to erroneous fetal heart rate readings in medical applications due to intermittent or permanent cable faults, as they only latch off the receiver output upon detecting specific fault conditions and not upon the first occurrence of a fault, causing spurious noise to be processed and displayed.
Innovation Solution
A fail-safe differential receiver with a latchable control signal interrupt capability, utilizing a differential amplifier, multiple comparators, and a latch-capable combinational logic device to detect and latch off the receiver output upon detection of single differential input disconnects, intermittent connections, or short circuits, preventing further output until the fault is corrected.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If prior LVDS circuits use frontend pull-up resistor bias and backend parallel circuits to detect fault conditions, then certain fault conditions (both inputs open, both inputs shorted, both inputs undriven) are detected, but single differential input disconnects are not detected, leading to erroneous output
Solution Approach 1:
The patent divides the fault detection function into separate detection paths: one path detects traditional fault conditions (both inputs open/shorted/undriven) using existing parallel circuit logic, while another path detects single input disconnects using a dedicated detector circuit. This segmentation allows comprehensive fault coverage without requiring complete redesign of the existing circuit architecture.
Solution Approach 2:
The patent introduces a latch circuit as an intermediary element that captures and holds the fault detection signal. The latch receives inputs from both the traditional parallel circuit detector and the new single-input disconnect detector, and it maintains the fault state until reset. This intermediary latch enables the system to reliably detect and respond to single input disconnects while maintaining compatibility with existing fault detection mechanisms.
2Productivity
If prior LVDS circuits do not latch off the receiver output upon first fault occurrence, then the circuit continues operating and processing signals, but intermittent cable faults cause spurious noise to be processed and displayed as erroneous fetal heart rate readings
Solution Approach 1:
The patent implements a latch circuit that is set to capture the fault condition at its first occurrence. When the detector identifies a single input disconnect, the latch is immediately set, which then blocks the receiver output before spurious noise can be processed. This preliminary latching action prevents erroneous readings while maintaining continuous operation during normal conditions.
Solution Approach 2:
The patent converts the potentially harmful continuous operation during fault conditions into a beneficial feature by using the latch circuit to automatically stop processing when faults are detected. The latch transforms the continuous signal flow from a source of potential error into a controlled process that automatically safeguards against erroneous readings while maintaining productivity during normal operation.
3Adaptability or versatility
If LVDS circuits use traditional parallel fail-safe circuits detecting only three failure conditions, then the circuit design follows industry standard, but single input disconnects cause the transducer to send erroneous data without blocking the output
Solution Approach 1:
The patent creates a universal fault detection system that handles multiple types of fault conditions through a unified latch-based architecture. The detector circuit and latch mechanism work together to detect both traditional fault conditions (both inputs open/shorted/undriven) and single input disconnects, providing comprehensive fault coverage. This multi-functional approach eliminates erroneous data output across all fault types while maintaining a single coherent detection system.
Data Source
AI summary
The present invention relates to differential receivers, and more particularly to a fail-safe circuit for low-voltage differential signaling (LVDS) receivers having single differential input disconnect detection with a latchable control signal interrupt capability. In operation, the receiver output is applied to a Vout output as long as the control signal is in a normal operating state, and on the first occurrence of a fault condition trigger is applied to the input of a latch, the latch latches applying a fault state to the control signal which causes the Vout output to follow the control signal blocking the receiver output until the latch is reset after the fault has been corrected.