LVDS Receiver Feedback Circuit for Speed-Power Balancing
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Solution Overview
Problem
The existing low voltage differential signaling (LVDS) data transmission systems have a limitation in operation speed due to the small driving ability of n-channel MOS transistors in the receiver-side integrated circuit unit, which results in a trade-off between operation speed and power consumption.
Innovation Solution
The introduction of a feedback signal generating circuit that dynamically adjusts the driving abilities of the amplifier sections in the signal reception circuit, allowing for increased current flow without constant high power consumption by switching between different amplifier configurations based on feedback signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the driving ability of n-channel MOS transistors is increased to increase currents flowing through amplifiers, then the operation speed of the receiver is improved, but the power consumption is increased
Solution Approach 1:
The patent applies dynamics by making the transistor configuration adjustable rather than fixed. The receiver can dynamically switch between single-transistor and dual-transistor amplifier configurations based on operational requirements, allowing the system to optimize between speed and power consumption in real-time rather than being constrained to a static design
Solution Approach 2:
The patent changes the parameter of transistor quantity from a fixed value to a variable parameter. By controlling the number of active transistors (one or two) in the amplifier sections through feedback signals, the system can adjust its electrical characteristics to achieve different operating modes, resolving the trade-off between speed and power consumption
2Speed
If two n-channel MOS transistors are always deeply turned ON to increase driving ability, then the operation speed is improved, but the total currents and power consumption are increased
Solution Approach 1:
The patent implements periodic action by using feedback signals to periodically activate additional transistors only when needed for signal transitions. Rather than keeping transistors continuously ON, the system periodically engages extra transistors during critical moments (signal changes) and returns to lower-power operation during steady states
Solution Approach 2:
The patent applies partial action by using just enough transistor driving capability required for each operational condition. Instead of always employing maximum driving ability (two deeply turned ON transistors), the system uses partial capacity (single transistor) during stable periods and excess capacity (dual transistors) only during transitions, optimizing the balance between speed and energy loss
Data Source
AI summary
A receiver is constructed by a signal reception circuit including a first amplifier section adapted to generate a first current in response to a first input signal and a second amplifier section adapted to generate a second current in response to a second input signal, to thereby generate an amplification signal in accordance with a difference between the first and second currents, and a feedback signal generating circuit adapted to generate a feedback signal in accordance with the amplification signal. Driving abilities of the first and second amplifier sections are determined in accordance with the feedback signal.