LVDS Receiver Circuit With Folded-Cascode OTA for Low-Power Bandwidth
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Solution Overview
Problem
Conventional LVDS receiver circuit designs face challenges in reducing power consumption and area while maintaining high gain and bandwidth to regenerate low-voltage, low-edge-rate signals with a large common-mode input range.
Innovation Solution
The implementation of a folded-cascode operational transconductance amplifier (OTA) with multiple supply voltage domains, utilizing a p-channel metal-oxide semiconductor (PMOS) input pair and a common-mode feedback circuit to regulate the second supply voltage domain, reduces power consumption and improves bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a folded-cascode OTA with PMOS input pair and domain shifter circuit is used, then gain and bandwidth are improved, but power consumption and area increase
Solution Approach 1:
The circuit is divided into multiple supply voltage domains (first domain with voltage VDD1 and second domain with voltage VDD2). The folded-cascode OTA operates with different supply voltages in different stages, allowing optimization of power consumption while maintaining gain and bandwidth performance. The domain shifter circuit transitions signals between these voltage domains efficiently.
Solution Approach 2:
The patent changes the supply voltage parameter across different circuit domains. By using multiple supply voltage domains with different voltage levels (VDD1 and VDD2), the circuit achieves high gain and bandwidth in the first domain while reducing power consumption in the second domain, resolving the contradiction between performance and power efficiency.
2Adaptability or versatility
If a folded-cascode OTA with PMOS input pair is used, then common-mode input range is improved, but area increases
Solution Approach 1:
The circuit architecture segments the folded-cascode OTA into efficient stages that achieve wide common-mode input range without requiring excessive transistor widths or additional circuit blocks. The multiple supply voltage domains allow compact design while maintaining adaptability to large common-mode voltage variations.
Solution Approach 2:
By changing supply voltage parameters across domains, the circuit achieves wide common-mode input range (0.2V to 2.2V) in a compact area. The different voltage levels enable efficient transistor operation across the full input range without requiring oversized devices.
3Adaptability or versatility
If conventional domain shifter circuit is used, then voltage domain conversion is achieved, but power consumption increases
Solution Approach 1:
The domain shifter circuit is designed to dynamically transition signals between different supply voltage domains (VDD1 and VDD2) with optimized power consumption. The circuit adapts its operation mode based on the voltage domain, achieving efficient voltage conversion without excessive power dissipation.
Solution Approach 2:
The domain shifter efficiently converts voltages between domains by utilizing the multiple supply voltage architecture. By changing operating voltage parameters strategically, the shifter achieves voltage domain conversion with reduced power consumption compared to conventional single-domain designs.
Data Source
AI summary
The invention provides a Low-voltage Differential Signaling (LVDS) receiver circuit that comprises a folded-cascode operational transconductance amplifier (OTA) that includes a pair of input branches and a pair of output branches. The pair of input branches of the folded-cascode OTA includes a p-channel metal-oxide semiconductor (PMOS) input transistor pair connected to a first supply voltage domain. The pair of output branches includes an output circuit connected to a second supply voltage domain. The LVDS receiver circuit further includes a common-mode feedback circuit connected to the pair of output branches of the folded-cascode OTA that controls the second supply voltage domain. The LVDS receiver circuit further includes a regenerative buffer circuit connected to the pair of output branches of the folded-cascode OTA and an output generated from the pair of output branches of the folded-cascode OTA directly operates the regenerative buffer circuit to produce a distortion-free output signal.