M-Shaped Active Layer Thin Film Transistor for High Resolution Displays
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Solution Overview
Problem
Conventional low temperature polysilicon thin film transistors have a large size due to the requirement for long channel lengths, which is a challenge for implementing high resolution displays without increasing processing complexity.
Innovation Solution
The thin film transistor design includes an active layer with an M-shaped profile and a gate electrode with a V or U shape, with an intermediate insulating layer between the source and drain electrodes, allowing for a longer channel length without increasing the transistor size by forming the active layer in an M shape and the gate electrode in a V or U shape, maintaining slope angles between 30° and 60° to prevent film cracking, and using inorganic or organic materials with specific thicknesses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the channel length is increased to tens of micrometers for driver thin film transistors, then the transistor can provide sufficient driving capability, but the transistor size becomes too large to implement high resolution displays
Solution Approach 1:
The patent introduces a third dimension (vertical height) to extend the channel length. The active layer is formed with an M-shaped profile including upward and downward slopes, allowing the channel to extend vertically between source and drain electrodes while maintaining a compact planar footprint. This dimensional transition resolves the contradiction by providing long channel length without proportionally increasing transistor area.
Solution Approach 2:
The patent employs curved slope profiles (M-shape for active layer, V-shape or U-shape for gate electrode) instead of straight linear configurations. The slope angles are controlled between 30°-60° to prevent film cracking while maximizing the channel path length within the available area, effectively using curvature to pack more channel length into a smaller footprint.
2Area of stationary object
If the active layer is formed in an M shape and gate electrode in a V or U shape to increase channel length, then the transistor size is reduced, but the fabrication process complexity increases
Solution Approach 1:
The patent combines multiple functions into single process steps. The M-shaped active layer and V/U-shaped gate electrode are formed using the same patterning process and etching conditions, eliminating the need for separate processing steps for each component. This merging approach reduces fabrication complexity while achieving the desired complex geometries.
Solution Approach 2:
The patterning process is designed to self-form the M-shaped active layer and V/U-shaped gate electrode simultaneously through a single etching step. The process automatically creates the required slope angles (30°-60°) and geometric profiles without requiring additional manual intervention or complex multi-step procedures, allowing the structure to self-organize into the desired configuration.
Data Source
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Figure 8a~8c
AI summary
A thin film transistor and a fabricating method thereof as well as an array substrate and a display device are provided. The thin film transistor (1) includes a substrate (10), a source electrode (15) and a drain electrode (16) on the substrate (10), an active layer (11) on the source and drain electrodes, a gate insulating layer (12) on the active layer (11), and a gate electrode (13) on the gate insulating layer (12). The active layer (11) extends from the source electrode (15) towards the drain electrode (16) along a non-linear path.