In-Memory MAC Circuit Linearity via FET Mediator

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Solution Overview

Problem

Existing MAC circuits using resistive devices like RRAM and MRAM face issues with linearity between MAC operation results and outputs, sensitivity to resistance variations, and require additional circuits to correct on-off ratios, leading to inefficiencies and increased time and space requirements.

Innovation Solution

A MAC circuit design incorporating a field-effect transistor, a pair of resistive devices with variable resistance, and a capacitor, where resistance values are determined by intermediate and weight setting voltages, allowing for voltage-based output and precharging to ensure linearity and robustness against resistance variations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If traditional MAC circuits using resistive devices are used, then the circuit can perform MAC operations, but the linearity between MAC operation results and outputs deteriorates and sensitivity to resistance variations increases

Engineering Contradiction:
Improvelinearity between MAC operation results and outputsVSAvoidsensitivity to resistance variations
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent introduces a field-effect transistor as an intermediary component between the resistive devices and the output. The transistor's gate controls the flow of current through the resistive devices, mediating the relationship between resistance variations and output signals. This intermediary action linearizes the transfer function and reduces sensitivity to resistance variations by providing voltage-controlled current regulation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the operating parameters of the resistive devices by applying specific voltages to the field-effect transistor gate. By controlling the gate voltage, the transistor operates in different regions (cutoff, triode, saturation) to optimize the linearity and reduce sensitivity. This parameter control transforms the non-linear resistive device characteristics into a more linear response.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If additional circuits are added to correct on-off ratios, then the on-off ratio accuracy improves, but the device complexity increases

Engineering Contradiction:
Improveon-off ratio accuracyVSAvoidcircuit complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The field-effect transistor serves multiple functions simultaneously: it acts as a switch, a current regulator, and a linearization element. By using the same transistor component for multiple purposes, the patent avoids adding separate correction circuits while still achieving accurate on-off ratio control and improved linearity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The transistor inherently provides the correction function through its natural electrical characteristics. The gate-controlled channel conductance automatically compensates for resistance variations and on-off ratio inaccuracies without requiring external correction circuits. The device self-regulates the current flow based on gate voltage, providing built-in correction functionality.

Inventive Principle:
Principle #25Self-service

3Reliability

If more correction circuits are implemented, then the robustness against resistance variations improves, but the time and space requirements increase

Engineering Contradiction:
Improverobustness against resistance variationsVSAvoidoperation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The field-effect transistor acts as a real-time intermediary that continuously regulates current flow in response to gate voltage changes. This immediate mediation provides robustness against resistance variations without requiring time-consuming correction cycles or additional processing steps, maintaining fast operation while improving reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed MAC circuit ensures linearity between MAC operation results and outputs, is robust to resistance variations, and performs MAC operations efficiently with a guaranteed on-off ratio, even with small on-off ratios, thereby improving computational efficiency in neural network operations.

Implementation Method 1

a field-effect transistor configured to apply an intermediate voltage to a node

Methodology Applied
Scientific EffectField-effect transistor voltage control: Electric Field

Implementation Method 2

a pair of resistive devices having resistance values determined based on an intermediate voltage applied to one ends connected to a node and weight setting voltages applied to the other ends

Methodology Applied
Scientific EffectResistive device resistance control: Electrical Resistance

Implementation Method 3

a capacitor configured to be charged and discharged with an electric charge by receiving a voltage generated in the node based on a combined resistance value of the pair of resistive devices and input voltages applied individually to the other ends of the pair of resistive devices

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS20230053948A1Apparatus and method with in-memory computing
Publication Date: 2023.02.23 SAMSUNG ELECTRONICS CO LTD
  • US20230053948A1 patent drawing
  • US20230053948A1 patent drawing
  • US20230053948A1 patent drawing

AI summary

A multiply-accumulator (MAC) circuit includes: a plurality of multipliers each comprising: a field-effect transistor configured to apply an intermediate voltage to a node; a pair of resistive devices having resistance values determined based on the intermediate voltage applied to one ends connected to the node and weight setting voltages applied to the other ends; and a capacitor configured to be charged and discharged with an electric charge by receiving a voltage generated in the node based on a combined resistance value of the pair of resistive devices and input voltages applied individually to the other ends of the pair of resistive devices in response to individual resistance values of the pair of resistive devices being determined; and an output line configured to output a voltage based on electric charges charged to and discharged from the plurality of multipliers.