Media Access Controller Data Block Distribution for Ethernet Resource Reduction
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Solution Overview
Problem
Existing Ethernet interfaces require significant circuit resources to establish full mesh connections for reordering data block flows across multiple virtual lanes, leading to inefficient use of resources, particularly in high-speed Ethernet applications like 100 Gbps solutions.
Innovation Solution
A data transmission method that groups incoming packets into two sets, converting each set into separate data blocks with identifiers indicating their arrival sequence, and distributing these blocks to half the number of virtual lanes, reducing the need for extensive circuit connections and resources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a full mesh is established between N virtual lanes to map data blocks, then data block reordering is achieved, but circuit resources are significantly occupied
Solution Approach 1:
The patent segments the data block flow into multiple independent virtual lane flows without requiring full mesh connections. Each virtual lane processes data blocks independently with simplified mapping, avoiding the need for Nx(N-1) circuit connections while maintaining reordering capability through sequential processing and buffer management.
Solution Approach 2:
The patent introduces alignment markers as intermediary elements that carry virtual lane identifiers. These markers enable the receive PCS to identify and reorder data blocks from different virtual lanes without requiring complex full mesh circuit connections, simplifying the mapping process through marker-based identification.
2Adaptability or versatility
If N virtual lanes are used to support multiple Ethernet rates, then rate flexibility is improved, but the number of connections required increases to Nx(N-1)
Solution Approach 1:
The patent makes each virtual lane multi-functional by enabling it to handle multiple Ethernet rates (1G, 2.5G, 5G, 10G) through configurable data block widths. A single virtual lane can adapt its processing capacity based on the required rate, eliminating the need for dedicated lanes for each rate and reducing the total number of connections required.
Solution Approach 2:
The patent changes the data block width parameter dynamically to support different Ethernet rates. By adjusting the number of bytes per data block and the processing rate, the system can accommodate multiple Ethernet standards using the same virtual lane infrastructure, reducing connection complexity while maintaining rate flexibility.
Data Source
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AI summary
Embodiments of the present invention provide a data transmission method, including: receiving, by a receiving circuit in a media access controller, N packets; generating, by a distributing circuit, a first data block and a second data block, where the first data block includes a first set, and the second data block includes a second set; distributing, by the distributing circuit, the first data block to a first circuit, and distributing, by the distributing circuit, the second data block to a second circuit; converting, by the first circuit, the first data block into first data, and converting, by the second circuit, the second data block into second data; and sending, by the first circuit, the first data through a first channel, and sending, by the second circuit, the second data through a second channel. In addition, another method and a corresponding media access controller are further provided. The foregoing technical solution helps reduce circuit resources occupied by an Ethernet interface.