MAC Engine Switching Circuitry for Power Reduction
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Solution Overview
Problem
Processing units that perform a large number of multiply-accumulate (MAC) operations face power consumption challenges, limiting their use in devices with low power budgets.
Innovation Solution
A processing unit comprising a MAC engine with dot product units, switching circuitry, adders, and accumulators, where the switching circuitry is configurable to selectively couple adders to dot product units, allowing product values to be added to accumulators, thereby reducing power consumption by reusing input values between processing cycles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a processing unit performs a large number of MAC operations per second, then processing speed and productivity are improved, but power consumption increases
Solution Approach 1:
The processing unit is divided into multiple dot product units (first, second, third dot product units) that can operate independently and in parallel. Each dot product unit processes specific portions of the input data, allowing the system to achieve high throughput by segmenting the computational workload across multiple specialized units rather than using a single processing unit.
Solution Approach 2:
The patent combines multiple dot product units with a shared set of accumulators and switching circuitry to form an integrated MAC engine. The switching circuitry dynamically couples adders to selected dot product units, merging the computational capabilities of multiple units while sharing common resources (accumulators, switching fabric) to reduce overall power consumption compared to having completely separate processing paths.
2Use of energy by moving object
If switching circuitry is configured to selectively couple adders to dot product units, then power consumption is reduced through input value reuse, but device complexity increases
Solution Approach 1:
The switching circuitry is configured dynamically to couple adders to selected dot product units based on the current processing requirements. This dynamic reconfiguration allows the system to adapt the computational graph for each processing cycle, enabling input values to be reused across multiple dot product units when appropriate, thereby reducing power consumption while maintaining flexibility.
Solution Approach 2:
The switching circuitry serves multiple functions: it routes outputs from different dot product units to appropriate accumulators, enables input value reuse across processing cycles, and configures the computational graph dynamically. This multi-functional switching fabric reduces the need for dedicated routing logic for each function, managing complexity through universal resource sharing.
Data Source
AI summary
A processing unit comprises a multiply-accumulate engine and a control unit. The engine comprises a plurality of dot product units, switching circuitry, a plurality of adders, and a plurality of accumulators. The switching circuitry, coupled between the dot product units and the adders, is configurable to selectively couple each of the adders to one of the plurality of dot product units. The adders are each associated with a respective accumulator of the plurality of accumulators. In a processing cycle, each of the dot product units is configured to output a product value, the control unit is operable to configure the switching circuitry such that each of the adders is coupled to a selected dot product unit of the plurality of dot product units, and each of the adders is configured to add the product value of the selected dot product unit to an accumulated value stored by the respective accumulator.