MAC Loopback Cascading for Ultra-Low Latency Switch Signal Integrity

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Solution Overview

Problem

Ultra-low latency switches face issues with signal attenuation and reduced immunity to interference, leading to data loss and instability in high-frequency trading networks.

Innovation Solution

A cascading method for ultra-low latency switching apparatuses involving the allocation of enhanced signal ports and internal loopback links, along with pre-emphasis transmission parameters, to enhance signal integrity and support multi-level cascading.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If data packets are forwarded through physical links between ultra-low latency switches, then forwarding latency is reduced, but signal attenuation and reduced immunity to interference occur leading to data loss

Engineering Contradiction:
Improveforwarding latencyVSAvoidsignal integrity
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent introduces an intermediary signal enhancement mechanism at the MAC unit level. A first enhanced signal port is allocated to receive data packets from the switching hardware unit, and pre-emphasis transmission parameters are configured at destination ports to boost signal strength before transmission. This intermediary enhancement process compensates for signal attenuation while maintaining the direct physical link architecture, thus resolving the contradiction between low latency and signal integrity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent dynamically adjusts transmission parameters by configuring pre-emphasis settings at destination ports based on signal quality requirements. By changing transmission parameters (pre-emphasis levels) rather than altering the fundamental physical link structure, the system enhances signal immunity to interference while preserving ultra-low latency forwarding performance.

Inventive Principle:
Principle #35Parameter changes

2Length of stationary object

If ultra-low latency switches are cascaded to extend network coverage, then transmission distance is increased, but signal attenuation and interference immunity deteriorate

Engineering Contradiction:
Improvetransmission distanceVSAvoidsignal attenuation and interference
Core Design Contradiction:
Length of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary signal enhancement by allocating enhanced signal ports and configuring pre-emphasis transmission parameters before data packets traverse cascaded switches. This proactive signal boosting at source and intermediate points compensates for cumulative attenuation across multiple switches, enabling extended transmission distance while maintaining signal quality.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If Clock Data Recovery circuits are added to improve signal quality, then immunity to interference increases, but latency increases

Engineering Contradiction:
Improveimmunity to interferenceVSAvoidlatency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts the signal enhancement function from traditional Clock Data Recovery circuits and implements it directly at the MAC unit level using enhanced signal ports and pre-emphasis parameters. This extraction eliminates the need for separate CDR circuits, maintaining immunity to interference while avoiding the latency overhead associated with traditional CDR implementations.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentEP4672712A1Ultra-low latency switching apparatus and a cascading method thereof
Publication Date: 2025.12.31 NEW H3C TECH CO LTD
  • EP4672712A1 patent drawingFigure 1
  • EP4672712A1 patent drawingFigure 2
  • EP4672712A1 patent drawingFigure 3

AI summary

An ultra-low latency switching apparatus and a cascading method thereof are provided. In the method, one first enhanced signal port located at a Media Access Control, MAC, unit is allocated to a unidirectional forwarding port group of a switching hardware unit; the unidirectional forwarding port group comprises one first port serving as a source port and one or more second ports serving as destination ports, a first inter-chip link is established from the first port to the first enhanced signal port and reaches the second ports through an internal loopback of the first enhanced signal port; pre-emphasis transmission parameters for each of the second ports are set.