Hardware Coprocessor for MAC Scheduler Priority Calculation

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Solution Overview

Problem

Existing mobile wireless communication systems face challenges in effectively prioritizing packet transfers to meet quality of service parameters such as bit error rate, packet latency, and signal-to-noise ratio, which complicates traffic management.

Innovation Solution

A hardware-based priority calculation coprocessor is integrated into a Media Access Control (MAC) scheduler to compute a single priority value for each User Equipment using various metrics and a specified formula, improving scheduling efficiency by reducing processor load and enhancing resource allocation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If software-based priority calculation is used in MAC scheduler, then implementation flexibility is maintained, but processor load increases and scheduling efficiency decreases

Engineering Contradiction:
Improvescheduling efficiencyVSAvoidprocessor load
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The priority calculation function is extracted from the main MAC scheduler software and implemented as a separate hardware coprocessor. This allows the complex mathematical computations to be performed in dedicated hardware circuits, reducing the processor load and improving scheduling efficiency while maintaining implementation flexibility through configurable hardware parameters.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If multiple quality of service parameters are considered in packet prioritization, then service quality improves, but calculation complexity increases

Engineering Contradiction:
Improvequality of serviceVSAvoidcalculation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The quality of service parameters are segmented into separate input signals that feed into the hardware coprocessor. Each parameter (packet latency, bit error rate, signal-to-noise ratio) is processed independently through dedicated calculation paths, and the results are combined using configurable weights and formulas in the hardware circuit, reducing overall calculation complexity while maintaining comprehensive quality of service consideration.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9706564B2Apparatus and method for media access control scheduling with a priority calculation hardware coprocessor
Publication Date: 2017.07.11 MARVELL ASIA PTE LTD
  • US9706564B2 patent drawing
  • US9706564B2 patent drawing
  • US9706564B2 patent drawing

AI summary

An apparatus includes a Media Access Control (MAC) scheduler to generate a priority value calculation request with a specified formula and a list of metrics. A hardware based priority value calculation coprocessor services the priority value calculation request in accordance with the specified formula and the list of metrics.