Integrated Circuit Design Debugging with Machine Learning Signal Prediction

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Solution Overview

Problem

Modern integrated circuits, both analog and digital, are complex and time-consuming to design and test, with existing equivalence checking methods being time-intensive and difficult to synchronize across various timescales, especially for analog waveforms with continuous signals and non-binary outputs.

Innovation Solution

A method utilizing machine learning models to predict and compare signal values within integrated circuits, including training with selected test cases and using cascaded models to enhance prediction accuracy, even when internal signals are not directly accessible.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If detailed modeling is used to generate expected waveforms across multiple timescales, then measurement precision is improved, but loss of time increases significantly

Engineering Contradiction:
Improvewaveform detection accuracyVSAvoidmodeling time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent pre-generates waveform data at multiple timescales during the design phase and stores it for later use. By performing the time-consuming modeling and waveform generation in advance, the actual debugging process can quickly retrieve and compare pre-computed waveforms without repeating the expensive modeling operation, thus resolving the contradiction between measurement precision and time consumption.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent creates copies of waveform data at different timescales and stores them in a database. Instead of generating waveforms from scratch during debugging, the system retrieves pre-generated waveform copies that match the required timescale, significantly reducing the time needed while maintaining the precision of detailed modeling.

Inventive Principle:
Principle #26Copying

2Measurement precision

If equivalence checking is performed across multiple timescales, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improvewaveform comparison accuracyVSAvoidmodel synchronization complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces a waveform database as an intermediary layer between the detailed models at different timescales. This database stores pre-computed waveform data and provides a unified interface for retrieval, eliminating the need for complex real-time synchronization between models. The intermediary absorbs the complexity of multi-timescale coordination while providing simple query operations to users.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If detailed modeling is performed for every timescale, then reliability is improved, but productivity decreases

Engineering Contradiction:
Improvedebugging accuracyVSAvoiddebugging speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent performs detailed modeling and waveform generation in advance during the design phase, storing results in a database. During the actual debugging process, the system quickly retrieves pre-computed waveforms and performs comparison, maintaining high reliability through accurate pre-modeled data while dramatically improving productivity by avoiding repetitive detailed modeling operations.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12393755B2Machine learning techniques for circuit design debugging
Publication Date: 2025.08.19 TEXAS INSTRUMENTS INC
  • US12393755B2 patent drawing
  • US12393755B2 patent drawing
  • US12393755B2 patent drawing

AI summary

A method includes obtaining input signal values and output signal values from an integrated circuit and providing the obtained input signal values and output signal values to a machine learning model. The method further includes obtaining, from the machine learning model, a predicted set of signal values, wherein the predicted set of signal values correspond to signals internal to the integrated circuit and comparing the predicted set of signal values to one or more expected signal values for debugging the integrated circuit.