Machine Learning Multimedia Accelerator for Low-Latency Preprocessing

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Solution Overview

Problem

Existing machine learning processes face inefficiencies in terms of area, power usage, and latency due to the need for extensive read and write operations to storage devices, which can be exacerbated by the use of general-purpose processors like CPUs and GPUs.

Innovation Solution

Implementing a multimedia hardware accelerator within a compute cluster of a system on a chip, which includes a multimedia hardware accelerator and matrix processors like TPUs, to offload pre- and post-processing tasks, thereby reducing the burden on general-purpose processors and optimizing operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If general-purpose processors (CPU, GPU) are used for machine learning operations, then processing flexibility is maintained, but latency and power consumption increase

Engineering Contradiction:
Improveprocessing flexibilityVSAvoidlatency
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The system segments processing tasks by creating separate compute clusters dedicated to specific functions: one cluster handles multimedia pre-processing operations while another cluster handles matrix processing for machine learning. This segmentation allows each cluster to be optimized for its specific task, reducing overall latency while maintaining system versatility.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A buffer is introduced as an intermediary component between storage devices and compute clusters. The buffer stores multimedia data and provides it to compute clusters, reducing the need for frequent read operations from storage devices. This intermediary mechanism decreases latency by eliminating repeated storage access while maintaining data availability for flexible processing.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If general-purpose processors (CPU, GPU) are used for machine learning operations, then processing versatility is maintained, but power consumption increases

Engineering Contradiction:
Improveprocessing versatilityVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The system divides processing workloads into separate specialized clusters: one for multimedia pre-processing and another for matrix operations. Each cluster can be powered independently and optimized for its specific function, reducing overall power consumption compared to using high-power general-purpose processors for all tasks.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Pre-processing tasks are extracted from the main machine learning processing path and handled by a dedicated multimedia pre-processing compute cluster. This extraction allows the main matrix processing cluster to focus only on computationally intensive ML operations, reducing total power consumption while maintaining processing versatility.

Inventive Principle:
Principle #2Taking out (Extraction)

3Ease of operation

If frequent read and write operations to storage devices are performed, then data access is enabled, but latency and power usage increase

Engineering Contradiction:
Improvedata accessVSAvoidlatency
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

A buffer is introduced as an intermediary between storage devices and compute clusters. The buffer pre-loads and caches multimedia data, allowing compute clusters to access data without frequent storage device accesses. This maintains ease of data access while dramatically reducing latency associated with repeated storage operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The buffer performs preliminary data loading and caching operations before the compute clusters need the data. By pre-positioning data in the buffer, the system eliminates the need for frequent read operations during processing, reducing latency while maintaining continuous data availability.

Inventive Principle:
Principle #10Preliminary action

4Ease of operation

If frequent read and write operations to storage devices are performed, then data access is enabled, but power consumption increases

Engineering Contradiction:
Improvedata accessVSAvoidpower consumption
Core Design Contradiction:
Ease of operationVSUse of energy by moving object

Solution Approach 1:

The buffer acts as an intermediary data repository between storage devices and compute clusters. It maintains data in an easily accessible state without requiring continuous high-power storage device access, thus reducing power consumption while maintaining data access capability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

Data is preliminarily loaded into the buffer before processing begins. This preliminary action eliminates the need for continuous high-power storage device access during processing, reducing overall power consumption while maintaining data accessibility for the compute clusters.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250292147A1Machine learning multimedia accelerator
Publication Date: 2025.09.18 GOOGLE LLC
  • US20250292147A1 patent drawing
  • US20250292147A1 patent drawing
  • US20250292147A1 patent drawing

AI summary

Methods, systems, and apparatus, including computer programs encoded on computer storage media, for machine learning multimedia hardware acceleration. One of the methods includes retrieving multimedia data using a multimedia hardware accelerator of a first compute cluster of a system on a chip, wherein the first compute cluster includes (i) the multimedia hardware accelerator and (ii) one or more matrix processors that perform machine learning operations; performing a first set of operations using the multimedia hardware accelerator of the first compute cluster and the retrieved multimedia data, wherein the first set of operations include pre-processing the retrieved multimedia data, wherein the multimedia hardware accelerator includes circuit elements that are each configured to perform a respective operation in the first set of operations; processing, using the one or more matrix processors of the first compute cluster, the pre-processed multimedia data; and generating, by processing the pre-processed multimedia data, a model trained for predicting features of subsequent multimedia data.