Machine-Learning Photomask Correction for Pattern Transfer
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Solution Overview
Problem
The existing photolithography and etching processes in semiconductor fabrication often result in discrepancies between the designed circuit pattern and the actual pattern transferred onto the wafer due to optical proximity and loading effects, leading to inaccuracies in the formation of semiconductor devices.
Innovation Solution
A computing device employs a machine learning-based mask bias inferring model to correct the mask layout by inputting optical, geometrical, and resist feature vectors, iteratively generating predicted patterns and comparing them to the target design layout to determine and apply mask corrections, thereby improving the accuracy of pattern transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional photolithography and etching processes are used, then the fabrication process is simple and fast, but the pattern transfer accuracy deteriorates due to optical proximity and loading effects
Solution Approach 1:
The patent applies preliminary action by performing mask bias inference and pattern prediction before actual fabrication. The system calculates optimal mask biases and generates predicted patterns in advance, allowing corrections to be applied to the mask design before manufacturing, thus preventing pattern transfer errors rather than correcting them after the fact.
Solution Approach 2:
The patent implements feedback by using measured wafer patterns and edge placement errors to train machine learning models that continuously improve mask bias inference accuracy. The system compares predicted patterns with actual measurement data and uses this feedback to refine the model, creating a closed-loop system that enhances pattern transfer accuracy over time.
2Manufacturing precision
If mask correction methods are applied to improve pattern accuracy, then manufacturing precision improves, but computation time and processing complexity increase
Solution Approach 1:
The system performs mask bias inference and pattern prediction as preliminary steps before final mask fabrication. By calculating corrections in advance and applying them to the mask design, the system avoids time-consuming iterative adjustments during actual manufacturing, reducing overall processing time while maintaining high precision.
Solution Approach 2:
The patent replaces traditional mechanical and empirical mask correction methods with machine learning-based computational models. The ML models rapidly infer mask biases and predict patterns, substituting slow, trial-and-error physical adjustment processes with fast, accurate computational predictions that reduce computation time while improving precision.
3Measurement precision
If comprehensive feature vectors (optical, geometrical, resist) are used in mask bias inference, then prediction accuracy improves, but model complexity and data processing requirements increase
Solution Approach 1:
The patent segments the complex mask bias inference problem into distinct feature components: optical features, geometrical features, and resist features. Each feature type is extracted and processed separately, allowing the model to handle complexity in a modular fashion while maintaining high inference accuracy through comprehensive feature analysis.
Solution Approach 2:
The machine learning model is designed with multi-functionality to handle multiple feature types (optical, geometrical, resist) and perform multiple tasks (mask bias inference, pattern prediction, error correction) using a unified framework. This universal approach reduces overall system complexity by consolidating multiple specialized models into one versatile system.
Data Source
AI summary
A method is presented for correcting a photomask includes receiving a target design layout of a semiconductor device. The method includes inferring, by a processor, a mask bias by inputting into a first machine learning model an optical feature value, a geometrical feature value, and a resist feature value of a mask layout based on the target design layout. The processor generates a predicted pattern by incorporating the mask bias in the mask layout, and by comparing the predicted pattern with the target design layout the processor then corrects the mask layout based on a result of the comparison between the predicted pattern and the target design layout.