Magnetic Cell With Ovonic Threshold Switch Shunting Layer
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Solution Overview
Problem
Conventional spin transfer torque magnetic random access memories (STT-MRAMs) are prone to damage from overshoot voltage and electrostatic discharge (ESD) due to lack of adequate protection, affecting performance, lifetime, and reliability.
Innovation Solution
Incorporating an ovonic threshold switch (OTS) layer that covers the sidewalls of the magnetic junction, allowing excess current to be shunted away and shaping the write pulse to prevent damage, thereby enhancing protection against ESD and voltage-induced damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional MTJ is used in STT-MRAM without additional protection layers, then the device structure remains simple, but the magnetic junction is vulnerable to damage from overshoot voltage and ESD
Solution Approach 1:
An ovonic threshold switch (OTS) layer is introduced as an intermediary component between the transistor and the magnetic tunnel junction. This OTS layer acts as a mediator that protects the MTJ from harmful voltage spikes and ESD events while allowing normal operation currents to pass through, thus resolving the contradiction between reliability improvement and structural simplicity
Solution Approach 2:
The magnetic junction structure is segmented by adding the OTS layer as a distinct functional component. This segmentation allows the protection function to be separated from the storage function, enabling the MTJ to be protected without compromising its core functionality while maintaining a relatively simple overall structure
2Reliability
If higher current is driven through the conventional MTJ to ensure reliable switching, then the switching reliability improves, but the risk of damage from overshoot voltage and ESD increases
Solution Approach 1:
The OTS layer is designed to exploit harmful voltage spikes and ESD events by becoming conductive at high voltage thresholds, thereby converting potentially damaging current paths into protective shunt paths. This allows the system to benefit from higher current capability while the OTS prevents actual damage by redirecting excessive current away from the MTJ
Solution Approach 2:
The OTS layer changes its electrical resistance parameter dynamically based on the applied voltage. At normal operating voltages, it maintains high resistance to minimize current leakage, but at overshoot or ESD voltage levels, it transitions to a low resistance state to shunt harmful currents, thus enabling reliable switching while protecting against damage
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The OTS layer improves the reliability and performance of STT-MRAMs by enabling faster and more reliable switching while reducing the risk of damage from ESD and overshoot voltages.
Implementation Method 1
The magnetic cell includes a magnetic junction and an ovonic threshold switch (OTS) layer. The OTS layer covers at least a portion of the plurality of sidewalls. Use of the OTS layer may allow excess current to be shunted away from the magnetic junction when a sufficiently high voltage is applied across the magnetic junction.
Implementation Method 2
STT-MRAM utilizes magnetic junctions written at least in part by a current driven through the magnetic junction. A spin polarized current driven through the magnetic junction exerts a spin torque on the magnetic moments in the magnetic junction. As a result, layer(s) having magnetic moments that are responsive to the spin torque may be switched to a desired state.
Data Source
AI summary
A magnetic cell and method for providing the magnetic cell are described. A magnetic cell resides on a substrate and is usable in a magnetic device. The magnetic cell includes a magnetic junction and an ovonic threshold switch (OTS) layer. The magnetic junction has a plurality of sidewalls. The magnetic junction includes a free layer switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction, a nonmagnetic spacer layer and a pinned layer. The nonmagnetic spacer layer is between the pinned layer and the free layer. The OTS layer covers at least a portion of the plurality of sidewalls.


