Magnetic Self-Alignment for Semiconductor Chip Stacking

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Solution Overview

Problem

Current multi-chip stacked package technologies face challenges in reducing the distance between through-vias in substrates due to misalignment issues and limited spacing reduction, hindering the integration and performance of semiconductor devices.

Innovation Solution

The semiconductor device employs through-electrodes with magnetic polarities to facilitate self-alignment using magnetic forces, allowing for reduced via distances and improved integrity by connecting bumps with different magnetic polarity directions between chips.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If optical methods are used for multi-chip stacking, then alignment can be achieved, but misalignment occurs and spacing reduction is limited

Engineering Contradiction:
Improvealignment precisionVSAvoidspacing reduction capability
Core Design Contradiction:
Manufacturing precisionVSEase of operation

Solution Approach 1:

The patent replaces optical alignment methods with a magnetic field-based self-alignment mechanism. Through-electrodes with magnetic materials generate magnetic fields that automatically align chips during bonding without requiring optical systems, thereby achieving precise alignment while enabling greater spacing reduction between through-vias.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The invention implements self-alignment through magnetic fields generated by the through-electrodes themselves. The magnetic materials within the through-electrodes create magnetic fields that automatically guide and align the chips during the bonding process, eliminating the need for external optical alignment equipment and enabling the system to self-correct positioning.

Inventive Principle:
Principle #25Self-service

2Quantity of substance

If distance between through-vias is reduced to increase integration, then scaling is improved, but misalignment issues worsen

Engineering Contradiction:
Improveintegration densityVSAvoidalignment accuracy
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

By replacing optical alignment with magnetic field-based self-alignment, the patent enables reduced spacing between through-vias while maintaining or improving alignment accuracy. The magnetic fields provide continuous guidance during bonding, ensuring precise alignment even at smaller spacings where optical methods fail.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The invention changes the alignment mechanism from optical to magnetic field-based, fundamentally altering the physical parameter used for alignment. This parameter change enables operation at smaller through-via spacings while maintaining alignment precision, as the magnetic field range and strength can be adjusted to match the reduced spacing.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables precise self-alignment and reduced distances between through-vias, enhancing the integration and performance of semiconductor devices while improving the integrity of the semiconductor device.

Implementation Method 1

an end of the first through-electrode has a first magnetic polarity on the second surface, and an end of the second through-electrode has a second magnetic polarity opposite the first magnetic polarity on the second surface

Methodology Applied
Scientific EffectMagnetic polarity: Magnetism

Implementation Method 2

a direction of a magnetic field in the first bump is different from a direction of a magnetic field in the second bump

Methodology Applied
Scientific EffectMagnetic field: Magnetic Field

Data Source

PatentUS9773758B2Semiconductor device with magnetically aligned chips and method for fabricating the same
Publication Date: 2017.09.26 SAMSUNG ELECTRONICS CO LTD
  • US9773758B2 patent drawing
  • US9773758B2 patent drawing
  • US9773758B2 patent drawing

AI summary

A semiconductor device includes a first semiconductor chip adjacent a second semiconductor chip. The first semiconductor chip includes a first surface and a second surface. The second semiconductor chip includes a third surface and a fourth surface. The third surface faces the second surface. A first through-electrode and a second through-electrode are between the first and second surfaces. A third through-electrode is between the third surface and the fourth surface and is connected to the first through-electrode. A fourth through-electrode is between the third surface and the fourth surface and is connected to the second through-electrode. An end of the first through-electrode has a first magnetic polarity on the second surface, and an end of the second through-electrode has a second magnetic polarity opposite to the first magnetic polarity on the second surface.