Magnetic Correction Layer for Semiconductor Memory
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in reducing the influence of magnetic fields on free magnetic layers, leading to asymmetrical switching characteristics and difficulties in fabricating highly integrated arrays with small lateral dimensions while maintaining reliable performance.
Innovation Solution
Incorporating a magnetic correction layer with a magnetization direction opposite to the pinned magnetic layer to offset the magnetic field influence, and separating its fabrication from the MTJ junction layers to achieve a sufficient thickness without compromising lateral dimensions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the magnetic correction layer is integrated with the MTJ junction layers, then the fabrication process is simplified, but the thickness of the magnetic correction layer is insufficient to effectively offset magnetic field influence
Solution Approach 1:
The fabrication process is divided into two separate stages: first forming the MTJ junction layers (pinned magnetic layer, tunnel barrier layer, free magnetic layer), then subsequently forming the magnetic correction layer after patterning the MTJ stacks. This segmentation allows each layer to be optimized independently for its specific function while achieving both sufficient thickness and effective integration.
2Productivity
If the lateral dimensions are reduced to achieve high integration, then the device density increases, but the magnetic field influence on the free magnetic layer becomes more significant
Solution Approach 1:
The magnetic correction layer is positioned in the vertical dimension above the MTJ junction layers, separated by an insulating layer. This vertical arrangement allows the correction field to act on the free magnetic layer without increasing lateral dimensions, thereby maintaining high integration density while effectively counteracting magnetic field influence through the oppositely directed magnetization.
3Reliability
If the magnetic correction layer is formed with sufficient thickness, then the magnetic field offset is improved, but the fabrication complexity increases
Solution Approach 1:
The MTJ junction layers and electrical contacts are fully formed and patterned before depositing the magnetic correction layer. This preliminary action establishes the structural foundation, allowing the magnetic correction layer to be deposited as a subsequent step with optimized thickness without requiring re-patterning or additional complex fabrication processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the switching characteristics and enables the fabrication of highly integrated semiconductor memory devices with improved reliability and performance by effectively reducing the magnetic field influence on free magnetic layers.
Implementation Method 1
the magnetic correction layer is configured to exhibit a magnetization direction which is opposite to a magnetization direction of the pinned magnetic layer to offset an influence of a magnetic field of the pinned magnetic layer to the free magnetic layer
Implementation Method 2
a magnetic correction layer located over the second electrical contact so that the second electrical contact is between the magnetic correction layer and the resistance variable element
Data Source
AI summary
A semiconductor device includes a resistance variable element including a free magnetic layer, a tunnel barrier layer and a pinned magnetic layer; and a magnetic correction layer disposed over the resistance variable element to be separated from the resistance variable element, and having a magnetization direction which is opposite to a magnetization direction of the pinned magnetic layer.


