Magnetic Disk Device Dual Controller Architecture
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Solution Overview
Problem
The existing magnetic disk devices with multiple magnetic heads and actuators face performance degradation due to the indirect connection of the second controller chip to the third memory through the first controller chip, leading to slower access times and reduced performance, especially when accessing management information.
Innovation Solution
The implementation of System-on-a-Chip (SoC) with identical hardware configuration and separate SRAM as cache memory for the second controller chip to directly access and store management information, reducing dependency on the buffer memory and enhancing data access speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the second controller chip is indirectly connected to the third memory through the first controller chip, then the device structure is simplified, but the access speed and performance are reduced
Solution Approach 1:
The patent divides the memory system into two segments: a first memory (buffer memory) connected to both controller chips, and a second memory (third memory) directly connected only to the second controller chip. This segmentation allows the second controller chip to access management information through a dedicated direct connection, avoiding the performance degradation that would result from routing all accesses through the first controller chip while maintaining overall structural simplicity.
2Device complexity
If the second controller chip accesses management information through the first controller chip, then the connection structure is simplified, but the access time increases
Solution Approach 1:
The patent introduces a dedicated direct connection as an intermediary pathway between the second controller chip and the third memory. This intermediary connection allows management information to be accessed directly without passing through the first controller chip, thereby reducing access time while keeping the overall connection structure relatively simple through the use of a dedicated communication channel.
3Speed
If separate SRAM is implemented as cache memory for the second controller chip, then data access speed is improved, but device complexity increases
Solution Approach 1:
The patent implements separate SRAM as cache memory in the second controller chip to store management information in advance. This preliminary action allows the second controller chip to quickly access frequently used management information from the local SRAM cache without repeatedly accessing the third memory through the first controller chip, thereby improving data access speed while the increased hardware complexity is justified by the performance gains.
Data Source
AI summary
According to one embodiment, a magnetic disk device includes a magnetic disk, a first magnetic head and a second magnetic head that are moved independently of each other, a first controller chip, a second controller chip, and a third memory. The first controller chip includes a first processor and a first memory, and controls the first magnetic head. The second controller chip includes a second processor and a second memory, and controls the second magnetic head. Management information is stored in the third memory. The first controller chip is connected to the third memory. The second controller chip is connected to the third memory via the first controller chip. The second controller chip saves the management information into the second memory.