Magnetic Field-Partitioned Non-Volatile Memory Cell Design
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Solution Overview
Problem
As resistive random access memories (RRAM) approach 10 nm design rules, line resistance becomes significant, and 3D non-volatile memories increase cost due to additional film deposition and etching steps, limiting scalability and bit density.
Innovation Solution
A magnetic field-partitioned non-volatile memory cell design using high-mobility materials for electrodes and resistance-changing memory materials, with on-chip solenoids generating external magnetic fields to store multiple bits in independent portions of the memory material, allowing for multi-bit storage without increasing silicon periphery area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If 3D non-volatile memory structures are used to increase bit density, then storage capacity is improved, but manufacturing complexity and cost increase due to additional film deposition and etching steps
Solution Approach 1:
The memory cell is segmented into distinct functional regions: a resistance-changing memory material layer for data storage, and a separate high-mobility material layer for carrier generation and magnetic field response. This segmentation allows each layer to be optimized independently, simplifying the manufacturing process while maintaining high bit density capabilities
Solution Approach 2:
The high-mobility material layer serves multiple functions: it generates charge carriers under applied voltage, responds to external magnetic fields for bit partitioning, and facilitates resistance switching in the memory material. This multi-functionality eliminates the need for additional specialized layers, reducing manufacturing complexity
2Length of moving object
If conventional RRAM structures are scaled to 10 nm design rules, then device size is reduced, but line resistance becomes significant and degrades performance
Solution Approach 1:
The patent changes the material parameter by introducing high-mobility materials (such as topological insulators or two-dimensional materials) with carrier mobilities exceeding 10,000 cm²/Vs. This parameter change dramatically reduces line resistance in scaled devices, maintaining performance even at 10 nm and below device sizes
3Quantity of substance
If external magnetic fields are applied to partition bit storage portions, then multi-bit storage capability is improved, but additional on-chip solenoids and control circuitry are required
Solution Approach 1:
The patent merges the magnetic field generation function with existing memory cell components. The high-mobility material layer itself responds to external magnetic fields applied by shared on-chip solenoids, eliminating the need for dedicated magnetic field generation structures at each memory cell. This combining approach enables multi-bit storage while minimizing additional complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances bit density and reduces costs by using external magnetic fields to partition bit storage, enabling efficient multi-bit storage without the need for additional layers or complex processing steps, potentially doubling bit density in 3D structures compared to conventional approaches.
Implementation Method 1
at least two on-chip solenoids respectively surrounding the non-volatile memory array to generate external magnetic fields
Implementation Method 2
A top electrode including a high-mobility material is disposed on the resistance-changing memory material. At least two bits are stored in portions of the resistance-changing memory material connecting to the top electrode when an external magnetic field is applied along different directions
Data Source
AI summary
A non-volatile memory cell and a magnetic field-partitioned non-volatile memory for multi-bit storage are provided. The non-volatile memory cell for multi-bit storage includes a bottom electrode. A resistance-changing memory material covers the bottom electrode. A top electrode including a high-mobility material is disposed on the resistance-changing memory material. The top electrode has two post portions supporting a bar-shaped portion. At least two bits are stored in portions of the resistance-changing memory material connecting to the top electrode when an external magnetic field is applied along different directions.