Magnetic Inter-Chip Interface for 3D Stacks With Alignment Tolerance
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Solution Overview
Problem
Current methods for data transmission between three-dimensional stacked chips face challenges such as high power consumption, poor interference resistance, and alignment requirements, leading to inefficiencies and reliability issues.
Innovation Solution
A magnetic coupling-based inter-chip wireless communication interface utilizing planar spiral inductors and bidirectional pulse modulation for data and clock signals, enabling low-power, high-speed data transmission with improved crosstalk resistance and alignment tolerance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If Through Silicon Via (TSV) is used for wired data transmission between chips, then data transmission reliability is improved, but manufacturing complexity and cost increase significantly
Solution Approach 1:
The patent replaces the mechanical TSV wiring system with a magnetic coupling wireless transmission system. Instead of physically connecting chips through silicon vias, the invention uses magnetic fields to transmit data signals between stacked chips, eliminating the need for complex TSV fabrication and bonding processes while maintaining reliable data transmission
Solution Approach 2:
The patent introduces magnetic coupling as an intermediary mechanism for data transmission between chips. The magnetic field acts as a mediator that transfers information across the interface between stacked chips without requiring direct physical contact or wired connections, thus simplifying manufacturing while ensuring transmission reliability
2Device complexity
If magnetic coupling is used for three-dimensional stacked communications, then device complexity is reduced, but power consumption increases and interference resistance deteriorates
Solution Approach 1:
The patent employs periodic clock signals to synchronize data transmission in the magnetic coupling system. By using periodic sampling and clocked operation, the system achieves efficient power utilization and reduces overall power consumption while maintaining communication reliability in three-dimensional stacked architectures
Solution Approach 2:
The patent optimizes magnetic coupling parameters such as frequency, amplitude, and timing to reduce power consumption and minimize interference. By carefully adjusting these parameters, the system achieves low-power operation while maintaining strong signal integrity and resistance to crosstalk in densely stacked chip configurations
3Device complexity
If magnetic coupling is used for three-dimensional stacked communications, then device complexity is reduced, but interference resistance deteriorates
Solution Approach 1:
The patent segments the magnetic coupling interface into separate data and clock channels, with dedicated inductors for each function. This segmentation allows independent optimization of each channel and reduces mutual interference between data signals and clock signals in the three-dimensional stacked chip system
Solution Approach 2:
The patent uses periodic clock signals and synchronized sampling to improve interference resistance. By sampling data at specific clock edges and using differential signaling, the system effectively rejects common-mode noise and crosstalk while maintaining simple magnetic coupling architecture
4Ease of operation
If data signals are transmitted through silicon substrate, then alignment requirements are reduced, but signal integrity may deteriorate
Solution Approach 1:
The patent replaces direct electrical signal transmission through the silicon substrate with magnetic field-based wireless transmission. This substitution allows greater tolerance in alignment between stacked chips since magnetic coupling does not require precise physical contact, while maintaining signal integrity through optimized magnetic inductor design and coupling geometry
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves low-power, high-speed data transmission with reduced alignment requirements, enhanced interference resistance, and lower bit error rates, suitable for high-performance computing systems and devices with stringent power and heat dissipation constraints.
Implementation Method 1
the data transmitting module and the data receiving module that correspond to each other establish a magnetic coupling relationship in a vertical direction between the data transmitting inductor and the data receiving inductor
Implementation Method 2
the clock transmitting module and the clock receiving module establish a magnetic coupling relationship in a vertical direction between the clock receiving inductor and the clock transmitting inductor
Data Source
AI summary
Disclosed are a magnetic coupling-based inter-chip wireless communication interface structure and method for three-dimensional stacked chips. The interface structure includes a master chip and at least one slave chip, wherein the master chip and all the slave chips are vertically stacked; the slave chip includes a clock receiving module, a data transmitting module, and a data receiving module; the master chip includes a clock transmitting module, a data transmitting module, and a data receiving module. The solution herein makes use of the magnetic coupling relationship between on-chip spiral inductors of different chips in a vertical direction to simultaneously transmit data and clock signals. The communication method herein modulates each bit of digital signal into a differential bi-directional non-return-to-zero pulse train and performs decision and data parsing at the receiving end by a high-speed dynamic comparator.