Magnetic Junction Memory Device Array Area Reduction

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Solution Overview

Problem

Magnetic junction memory devices face challenges in reducing the size of memory cell arrays and minimizing read latency due to the characteristics of sensing operations in spin torque transfer-magnetic random-access memory (STT-MRAM) systems.

Innovation Solution

The implementation of a magnetic junction memory device with a sensing circuit, a gating voltage generator circuit, and a read circuit that utilizes reference resistors to generate a gating voltage and read data from magnetic junction memory cells, reducing the need for reference resistors within the memory cell arrays and enabling efficient data reading through single-transistor common-gate amplifier circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If reference resistors are integrated within the memory cell arrays for sensing operations, then the sensing accuracy is improved, but the area of memory cell arrays increases

Engineering Contradiction:

Improvesensing accuracyVSAvoidarea of memory cell arrays

Core Design Contradiction:

Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent extracts the reference resistors from the memory cell arrays and places them in separate dedicated regions. This separation allows the memory cell arrays to be smaller while still providing accurate reference resistance values for sensing operations, thus resolving the contradiction between sensing accuracy and array area.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent segments the reference resistance functionality into multiple distributed reference resistors located in different regions outside the memory cell arrays. This segmentation allows the sensing operation to access reference values without requiring the entire reference structure to be integrated within the compact memory cell array area.

Inventive Principle:

Principle #1Segmentation

2Measurement precision

If complex read circuits are used to read data from magnetic junction memory cells, then the data reading accuracy is improved, but the read latency increases

Engineering Contradiction:

Improvedata reading accuracyVSAvoidread latency

Core Design Contradiction:

Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-charging the sensing node to a predetermined voltage level before the actual sensing operation begins. This pre-positioning of the sensing node accelerates the subsequent sensing process, reducing read latency while maintaining accurate data reading through the controlled voltage transition.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent employs periodic action through controlled voltage transitions and clocked operations in the read circuit. By using periodic voltage changes and timed sequencing of read operations, the circuit achieves accurate data sampling at optimal moments while minimizing the overall read cycle time.

Inventive Principle:

Principle #19Periodic action

3Measurement precision

If more reference resistors are placed in each sub-memory cell array for local sensing, then the sensing precision is improved, but the device complexity increases

Engineering Contradiction:

Improvesensing precisionVSAvoiddevice complexity

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies universality by designing reference resistors that serve multiple functions: they provide reference resistance values for sensing operations, act as current limiting elements, and serve as part of the voltage division network. This multi-functionality reduces the need for separate dedicated components, thereby reducing device complexity while maintaining sensing precision.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively reduces the size of memory cell arrays and minimizes read latency by using reference resistors outside the sub-memory cell arrays and employing single-transistor common-gate amplifier circuits to accurately read data based on resistance changes, enhancing the performance of magnetic junction memory devices.

Implementation Method 1

a resistance state of a magnetic tunneling junction (MJT)

Methodology Applied

Scientific EffectMagnetoresistance: Magnetoresistance

Implementation Method 2

spin torque transfer-magnetic random-access memory (STT-MRAM)

Methodology Applied

Scientific EffectSpin torque transfer:

Data Source

PatentUS11889703B2Magnetic junction memory device and reading method thereof

Publication Date: 2024.01.30 SAMSUNG ELECTRONICS CO LTD

AI summary

A magnetic junction memory device is provided. The magnetic junction memory device including a sensing circuit including a sensing node, the sensing node being connected to a first end of a transistor and configured to change a voltage of the sensing node in accordance with a resistance of a magnetic junction memory cell, a gating voltage generator circuit configured to generate a gating voltage of the transistor using a reference resistor and a reference voltage, and a read circuit configured to read data from the magnetic junction memory cell using the reference voltage and the voltage of the sensing node.