Magnetic Memory Bias Configuration for Testing and Performance

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Solution Overview

Problem

Magnetic memory devices face challenges in testing for proper functionality and configuring parameters to ensure efficient and long-term operation, particularly due to the complexity of their architecture and the need for thorough stress testing to verify viability over time.

Innovation Solution

The implementation of customized testing and configuration methods, including the use of redundant memory cells and specialized driver circuits, allows for efficient testing and optimization of magnetic memory devices by controlling current flow and voltage levels to stress components beyond normal operating limits, thereby determining optimal parameter settings for improved performance and longevity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If stress testing is performed beyond normal operating limits to ensure long-term viability, then reliability of the memory device is improved, but device complexity increases due to need for specialized driver circuits and configuration procedures

Engineering Contradiction:
Improvelong-term viabilityVSAvoidtesting and configuration complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing stress testing and determining optimal bias configurations during the manufacturing process before the memory device is deployed. This allows reliability to be improved through thorough testing while avoiding the need for complex user-side configuration procedures, as the optimal settings are pre-determined and stored in non-volatile memory during production.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The memory device performs self-testing and self-characterization during manufacturing without requiring external testing equipment or complex user intervention. The device automatically determines its own optimal bias configurations through internal stress testing and stores these settings in non-volatile memory, eliminating the need for complex external testing infrastructure.

Inventive Principle:
Principle #25Self-service

2Reliability

If thorough stress testing is conducted to identify potential failures, then reliability is improved, but loss of time increases due to extended testing duration

Engineering Contradiction:
Improvefunctionality verificationVSAvoidtesting time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

Stress testing is performed during the manufacturing process rather than during product use or quality control phases. This preliminary action allows comprehensive reliability verification to be completed before deployment, eliminating the need for time-consuming post-manufacturing testing and reducing the loss of time in the overall product lifecycle.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The stress testing process is integrated into the continuous manufacturing workflow, allowing testing to occur as part of the production process rather than as a separate, time-consuming phase. This continuity enables reliability verification without adding significant time overhead to the overall manufacturing cycle.

Inventive Principle:
Principle #20Continuity of useful action

3Productivity

If optimal bias configuration is determined through extensive testing, then productivity is improved through enhanced performance, but loss of time increases during the configuration process

Engineering Contradiction:
Improvedevice performanceVSAvoidconfiguration time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

Optimal bias configurations are determined during manufacturing through automated stress testing and performance optimization routines. These configurations are pre-determined and stored in non-volatile memory, eliminating the need for time-consuming configuration processes during product deployment or use. The productivity benefits are achieved without the time penalty of extensive user-side configuration.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The memory device automatically determines and configures its own optimal bias settings during manufacturing without requiring external configuration tools or user intervention. This self-characterization process optimizes performance while minimizing configuration time, as the device performs the optimization autonomously as part of the manufacturing workflow.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces testing time, identifies potential failures, and optimizes device performance by ensuring that magnetic memory devices operate within expected parameters, enhancing both short-term functionality and long-term viability.

Implementation Method 1

Writing to magnetic memory cells can be accomplished by sending a spin-polarized write current through the memory device where the angular momentum carried by the spin-polarized current can change the magnetic state of the free portion

Methodology Applied
Scientific EffectSpin transfer torque:

Implementation Method 2

the voltage drop across a magnetic tunnel junction (MTJ) in each memory cell can be varied based on the relative magnetic states of the magnetoresistive layers within the memory cell

Methodology Applied
Scientific EffectMagnetoresistance:

Data Source

PatentUS10923170B2Determining bias configuration for write operations in memory to improve device performance during normal operation as well as to improve the effectiveness of testing routines
Publication Date: 2021.02.16 EVERSPIN TECHNOLOGIES INC
  • US10923170B2 patent drawing
  • US10923170B2 patent drawing
  • US10923170B2 patent drawing

AI summary

Techniques and circuits for testing and configuring bias voltage or bias current for write operations in memory devices are presented. Registers and nonvolatile storage is included on the memory devices for storing values used to control testing of the memory devices as well as for configuring parameters related to both testing and normal operation.