Magnetic Memory Cell With Buried Word Lines
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current magnetic random access memory (MRAM) technologies face challenges in miniaturization and reducing electric current due to increased coercivity of magnetic bodies and limited spin-polarized electrons as element size decreases, affecting both miniaturization and current reduction.
Innovation Solution
The development of a magnetic memory structure with a semiconductor substrate, isolation regions, and buried word lines, along with a manufacturing method using Sidewall Patterning Technology (SPT) to form trenches and word lines, which reduces parasitic capacitance and contact resistance, enabling efficient miniaturization and current reduction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the element size is reduced for miniaturization, then the integration density is improved, but the coercivity of the magnetic body increases and the write current increases
Solution Approach 1:
The patent introduces a stacked three-dimensional structure with multiple magnetic tunnel junctions arranged vertically, transitioning from a planar two-dimensional layout to a three-dimensional configuration. This dimensional change allows multiple memory cells to share common bit lines and word lines, improving integration density while maintaining manageable current requirements through the vertical stacking architecture
Solution Approach 2:
The patent implements a shared bus structure where common bit lines and word lines serve multiple magnetic tunnel junctions simultaneously. This multi-functional approach allows a single write current pulse to affect multiple memory cells, improving write efficiency and reducing the overall current requirement for miniaturized structures
2Volume of moving object
If the element size is reduced for miniaturization, then the integration density is improved, but the number of spin-polarized electrons decreases
Solution Approach 1:
The patent merges multiple magnetic tunnel junctions into a stacked configuration where they share common electrical connections. By combining multiple cells that would individually require separate write currents, the stacked structure accumulates spin-polarized electrons across multiple junctions, compensating for the reduced electron quantity in individual miniaturized elements
Solution Approach 2:
The vertical stacking arrangement in three dimensions allows spin-polarized electrons to be distributed and accumulated across multiple layers. This dimensional transition from planar to vertical architecture enables the system to maintain sufficient spin-polarized electron quantities despite miniaturization of individual junctions
3Ease of manufacture
If traditional planar structure is used, then the manufacturing process is simple, but the parasitic capacitance and contact resistance increase
Solution Approach 1:
The patent transitions from a planar two-dimensional layout to a three-dimensional stacked structure, vertically separating magnetic tunnel junctions and their electrical connections. This dimensional change reduces the horizontal overlap between conductors, thereby decreasing parasitic capacitance while maintaining manufacturing feasibility through adapted fabrication processes
Solution Approach 2:
The patent segments the magnetic tunnel junctions into distinct stacked layers with isolated electrical connections. By dividing the structure into separate vertical segments rather than a continuous planar layout, the patent reduces unwanted electrical coupling and contact resistance between adjacent memory cells
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the miniaturization of MRAM while reducing electric current consumption and parasitic capacitance, enhancing the reliability and integration of magnetic memory cells.
Implementation Method 1
A large number of MRAMs, which use elements exhibiting a tunneling magnetoresistive (TMR) effect, among other magnetoresistive effects, have been reported.
Implementation Method 2
a write (spin injection write) scheme using spin angular momentum movement in which the magnetization direction in the recording layer is inverted by passing a spin polarization current through the MTJ element itself
Data Source
AI summary
According to one embodiment, a magnetic memory including an isolation region with an insulator in a trench is disclosed. The isolation region defines active areas extending in a 1st direction and having 1st and 2nd active areas, an isolation region extending in a 2nd direction perpendicular to the 1st direction exists between the 1st and 2nd active areas. 1st and 2nd word lines extending in the 2nd direction are buried in a surface of semiconductor substrate. 1st and 2nd select transistors connected to the word lines are on the 1st active area. 1st and 2nd variable resistance elements connected to drain regions of the 1st and 2nd select transistors are on the 1st active area.