Magnetic Memory Cell With Composite Selector Device
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Solution Overview
Problem
Conventional bidirectional two-terminal selector devices for memory applications have low on/off ratios and are prone to current leakage, limiting their effectiveness in achieving high switching speed and density in memory arrays.
Innovation Solution
A magnetic memory cell incorporating a magnetic tunnel junction (MTJ) coupled with a bidirectional two-terminal selector element, featuring a volatile switching layer with metal-rich particles in an insulating matrix, which provides improved switching characteristics and reduced leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional bidirectional two-terminal selector devices are used, then device complexity is reduced and manufacturing cost decreases, but on/off ratio is low and current leakage increases
Solution Approach 1:
The selector device employs a composite structure consisting of a chalcogenide layer (Ge-Sb-Te or Ge-Sb-Te-O) combined with a metal oxide layer (NiO or CoO). This composite material approach creates a tunneling barrier that significantly improves the on/off ratio while reducing current leakage compared to conventional single-material selector devices.
Solution Approach 2:
The invention changes the physical and chemical parameters of the switching layer by using specific chalcogenide compositions (Ge-Sb-Te or Ge-Sb-Te-O) with controlled thickness (5-20 nm) and combining them with metal oxide layers. These parameter changes enable the device to achieve high on/off ratio (>1000) and low leakage current while maintaining bidirectional operation.
2Productivity
If two-terminal selector devices are used instead of transistors, then memory cell size is reduced to 4F2 and density increases, but switching speed and on/off ratio are compromised
Solution Approach 1:
The selector device achieves fast switching speed through parameter optimization of the chalcogenide layer thickness (5-20 nm) and composition (Ge-Sb-Te or Ge-Sb-Te-O). The thin layer enables rapid electrical breakdown and switching, achieving nanosecond-scale switching speeds that maintain high productivity while enabling the compact 4F2 memory cell structure.
Solution Approach 2:
The composite structure of chalcogenide layer combined with metal oxide layer provides both fast switching characteristics and high on/off ratio. The metal oxide layer acts as a tunneling barrier that enables rapid switching while the chalcogenide layer provides the necessary nonlinearity, together achieving both high density and fast switching performance.
3Ease of manufacture
If conventional selector devices with simple structure are used, then ease of manufacture is improved, but on/off ratio and leakage current performance are insufficient
Solution Approach 1:
The switching layer is segmented into multiple functional sub-layers: a chalcogenide layer (Ge-Sb-Te or Ge-Sb-Te-O) and a metal oxide layer (NiO or CoO). This segmentation allows each layer to perform its specific function (nonlinearity from chalcogenide, tunneling barrier from metal oxide) while maintaining compatibility with standard semiconductor manufacturing processes, thus achieving high on/off ratio without significantly complicating fabrication.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables high on/off switching speed and low current leakage, enhancing memory array density and efficiency while being cost-effectively manufacturable.
Implementation Method 1
The volatile switching layer structure includes a plurality of metal-rich particles or clusters embedded in an insulating matrix
Implementation Method 2
Spin transfer torque magnetic random access memory (STT-MRAM) is a new class of non-volatile memory
Implementation Method 3
the electrical resistance of the magnetic memory element would change accordingly, thereby switching the stored logic
Data Source
AI summary
The present invention is directed to a memory cell that includes a magnetic tunnel junction (MTJ) memory element and a two-terminal selector element coupled in series. The MTJ memory element includes a magnetic free layer structure and a magnetic reference layer structure with an insulating tunnel junction layer interposed therebetween. The magnetic reference layer structure includes one or more magnetic reference layers having a first invariable magnetization direction substantially perpendicular to layer planes thereof. The two-terminal selector element includes a first inert electrode and a second inert electrode with a volatile switching layer interposed therebetween; a first active electrode formed adjacent to the first inert electrode; and a second active electrode formed adjacent to the second inert electrode. The volatile switching layer includes at least one conductor layer interleaved with insulating layers.