Magnetic Memory Bottom Electrode Contact Height Maintenance

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Solution Overview

Problem

The manufacturing of magnetic memory devices faces challenges in maintaining the vertical height of bottom electrode contacts while reducing the aspect ratio of cell and peripheral contact plugs, which can lead to defects and difficulties in formation.

Innovation Solution

The implementation of a structure where the cell conductive line and peripheral conductive line are provided in the second interlayer insulating layer, with the lower portion of each bottom electrode contact embedded in the second interlayer insulating layer, and the cell and peripheral contact plugs are formed on the cell and peripheral conductive lines, respectively, to maintain vertical height and reduce the aspect ratio of the contact plugs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the vertical height of bottom electrode contacts is maintained, then the reliability of electrical connection is improved, but the aspect ratio of contact plugs increases making formation difficult

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidcontact plug formation ease
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The contact structure is divided into multiple segments: the bottom electrode contact is separated from the contact plug by introducing an interlayer insulating layer between them. This segmentation allows the bottom electrode contact to maintain its vertical height for reliable electrical connection, while the contact plug can be formed with a reduced aspect ratio by extending horizontally along the interlayer insulating layer, thus resolving the contradiction between connection reliability and manufacturing ease.

Inventive Principle:
Principle #1Segmentation

2Ease of manufacture

If the aspect ratio of contact plugs is reduced, then the ease of formation is improved, but the vertical height of bottom electrode contacts decreases affecting electrical connection

Engineering Contradiction:
Improvecontact plug formation easeVSAvoidelectrical connection reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The contact structure transitions from a purely vertical configuration to a multi-dimensional structure by introducing the interlayer insulating layer. The contact plug extends horizontally along this insulating layer, changing the dimensional approach from vertical height to horizontal length, thereby reducing the aspect ratio while maintaining electrical connection reliability through the segmented structure.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If bottom electrode contacts are embedded in interlayer insulating layer, then manufacturing complexity is reduced, but device structure becomes more complex

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoiddevice structure complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The interlayer insulating layer serves multiple functions: it provides electrical isolation between the bottom electrode contact and the contact plug, and it provides a horizontal path for the contact plug to extend, reducing the aspect ratio. This multi-functionality simplifies the manufacturing process by combining isolation and structural support in a single layer, while the added structural element is justified by the manufacturing benefits.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10897006B2Magnetic memory device and method for manufacturing the same
Publication Date: 2021.01.19 SAMSUNG ELECTRONICS CO LTD
  • US10897006B2 patent drawing
  • US10897006B2 patent drawing
  • US10897006B2 patent drawing

AI summary

A magnetic memory device including a substrate including a cell region and a peripheral circuit region; a first interlayer insulating layer covering the cell region and the peripheral circuit region of the substrate; interconnection lines in the first interlayer insulating layer; a peripheral conductive line and a peripheral conductive contact on the first interlayer insulating layer on the peripheral circuit region, the peripheral conductive contact being between the peripheral conductive line and a corresponding one of the interconnection lines; a bottom electrode contact on the first interlayer insulating layer on the cell region and connected to a corresponding one of the interconnection lines; and a data storage pattern on the bottom electrode contact, wherein the peripheral conductive line is at a height between a top surface of the bottom electrode contact and a bottom surface of the bottom electrode contact.