Magnetic Memory Device Data Segmentation for Reliability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Magnetic memory devices using magnetic wires face challenges in achieving high density and practical input/output speeds while maintaining data integrity and reliability, as information degradation occurs during data movement through the magnetic wire due to fluctuation in domain wall movement speed.
Innovation Solution
The magnetic memory device subdivides input data into one-dimensional bit arrays and stores them in multiple magnetic shift registers on a last in, first out basis, using a controller to manage data movement and reduce the number of data movements, thereby minimizing information degradation and enhancing reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If data is stored in magnetic wires using domain wall movement, then high density memory is achieved, but information degradation occurs due to fluctuation in domain wall movement speed
Solution Approach 1:
The patent segments the data storage system into multiple magnetic shift register units, each handling a portion of the data. This segmentation allows parallel processing and reduces the data movement burden on individual wires, thereby minimizing information degradation while maintaining high density storage capability.
Solution Approach 2:
The patent applies preliminary action by pre-positioning domain walls in specific states before data writing and using pre-amplifier circuits to prepare signal conditions. This ensures stable domain wall movement and reduces fluctuations that cause information degradation, improving data integrity without sacrificing storage density.
2Productivity
If magnetic shift register units are used for data storage, then high input/output speed is achieved, but the number of data movements increases causing information degradation
Solution Approach 1:
The patent implements feedback mechanisms through sense amplifiers that continuously monitor domain wall positions and provide correction signals. This feedback loop compensates for data movement-induced degradation, enabling high input/output speeds while maintaining information integrity by actively correcting degradation effects.
Solution Approach 2:
The patent changes operational parameters by adjusting domain wall movement speeds and signal amplitudes dynamically. By optimizing these parameters in real-time, the system achieves high throughput while minimizing information degradation caused by excessive data movements through the magnetic wires.
3Productivity
If multiple magnetic shift register units are operated in parallel, then practical input/output speed is achieved, but device complexity increases
Solution Approach 1:
The patent merges multiple magnetic shift register units into a unified memory array structure with shared control logic. This merging approach enables parallel operation for high input/output speed while reducing overall device complexity through standardized unit designs and common infrastructure, making the system practical for real-world applications.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for high input/output speeds, increased reliability, and reduced data degradation, achieving practical magnetic memory and storage operations with improved data integrity.
Implementation Method 1
information degradation occurs during data movement through the magnetic wire due to fluctuation in domain wall movement speed
Data Source
AI summary
According to one embodiment, a magnetic memory device includes a first memory unit including a first memory array and a first drive unit, a second memory unit including a second memory array and a second drive unit, and a controller. The first memory array includes a first magnetic shift register unit. The second memory array includes a second magnetic shift register unit. The controller subdivides input data into a plurality of one-dimensional bit input arrays. The one-dimensional bit input arrays include a first array and a second array. The controller stores the first array in the first magnetic shift register unit on a last in, first out basis, and stores the second array in the second magnetic shift register unit on a last in, first out basis.