Magnetic Memory Integration via Vertical Transistor and Domain Wall Control
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Solution Overview
Problem
Magnetic memories with multiple magnetic members face challenges in achieving high integration due to the placement of both write and read portions on the same side, making it difficult to achieve efficient data storage and retrieval.
Innovation Solution
The design includes a magnetic memory configuration with a magnetic member extending in a specific direction, connected to interconnection wiring and a magnetoresistive element, utilizing a vertical thin film transistor and a control circuit to manage domain walls and facilitate high integration by optimizing the arrangement of magnetic members and interconnections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If both write and read portions are provided on the same side of magnetic members, then the magnetic memory structure is simplified, but integration density decreases
Solution Approach 1:
The patent transitions from a planar arrangement where both write and read portions are on the same side to a three-dimensional configuration where write and read portions are positioned at opposite ends of the magnetic member along its length. This dimensional reorganization allows for higher integration density while maintaining structural simplicity.
2Quantity of substance
If multiple magnetic members are provided in close proximity, then integration density increases, but interference between adjacent members increases
Solution Approach 1:
The patent extracts the write and read operations to opposite ends of the magnetic member, separating them spatially. This extraction reduces magnetic interference between adjacent members by ensuring that write currents flowing through one member do not interfere with read operations on neighboring members, enabling higher integration density.
3Quantity of substance
If write and read portions are positioned at opposite ends of magnetic members, then integration density increases, but device complexity increases
Solution Approach 1:
The patent implements multi-functional interconnection wiring that serves both write and read operations. The same interconnection structure is used to supply write currents to one end of magnetic members and to read signals from the other end, reducing the need for separate dedicated wiring and thereby limiting the increase in device complexity.
4Object-affected harmful factors
If magnetic members are arranged with sufficient spacing, then magnetic interference is reduced, but area occupied increases
Solution Approach 1:
The patent utilizes the longitudinal dimension of the magnetic member to separate write and read portions, rather than relying solely on lateral spacing. By positioning write and read operations at opposite ends along the length of the magnetic member, the design reduces the area required per memory cell while maintaining adequate separation to minimize magnetic interference.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for high integration of magnetic members, reducing the need for hold current and extending the margin between read and shift currents, thereby enhancing data storage and retrieval efficiency.
Implementation Method 1
a first magnetoresistive element electrically connected to the first end of the first magnetic member
Implementation Method 2
The first transistor has a first channel layer extending in the third direction and a first gate electrode covering at least part of an outer periphery of the first channel layer
Data Source
AI summary
A magnetic memory includes a planar electrode and a first wiring spaced from the electrode. A first magnetic member is between the electrode and the first wiring. The first magnetic member has a first end facing the first wiring and a second end facing the electrode. A magnetoresistive element is connected to the first end. A transistor is between the magnetoresistive element and the first wiring. The transistor has a channel layer and a gate electrode covering at least part of an outer periphery of the channel layer. One end of the channel layer is connected to the magnetoresistive element, and another end of the channel layer is connected to the first wiring. A second wiring has a portion between the electrode and the second end of the first magnetic member. A control circuit is electrically connected to the gate electrode, the electrode, and the first and second wirings.


