Magnetic Memory Interconnect Structure for Low-Power High-Speed Operation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing magnetic memory devices face challenges in achieving improved electrical characteristics, particularly in terms of high-speed and low-power consumption, which are essential for next-generation semiconductor memory devices.
Innovation Solution
The magnetic memory device incorporates a substrate with a cell region and a peripheral circuit region, featuring a specific layered structure including lower and upper interlayer insulating layers, etch stop layers, data storage structures, and a peripheral interconnection structure. This structure optimizes the electrical characteristics by controlling the resistance values of the magnetic tunnel junctions and enhancing interconnection efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the contact portions of the peripheral interconnection structure are made to extend deep toward the substrate, then the electrical connection is improved, but the manufacturing complexity increases due to the need for precise height control relative to lower contact plugs
Solution Approach 1:
The patent controls the height parameter of contact portions relative to lower contact plugs, establishing a specific dimensional relationship where contact portions are shorter. This parameter control enables simplified manufacturing processes while maintaining reliable electrical connections through the peripheral interconnection structure.
2Productivity
If the peripheral interconnection structure is designed with contact portions extending toward the substrate, then the interconnection efficiency is improved, but the device complexity increases due to multiple interlayer insulating layers and etch stop layers
Solution Approach 1:
The peripheral interconnection structure is segmented into distinct functional components: contact portions for electrical connection, line portions for signal transmission, and insulating layers for isolation. This segmentation allows each component to be optimized independently, improving overall interconnection efficiency while managing device complexity through modular design.
Solution Approach 2:
Etch stop layers are introduced as intermediary elements between the peripheral interconnection structure and the substrate, and between different interlayer insulating layers. These intermediary layers facilitate controlled fabrication processes and enable the complex multi-layer structure to be manufactured with improved efficiency and precision.
3Ease of manufacture
If the contact portions are made shorter than lower contact plugs, then the manufacturing process is simplified, but the electrical characteristics may be affected
Solution Approach 1:
The patent optimizes the height parameter of contact portions, setting them shorter than lower contact plugs. This parameter change simplifies the manufacturing process by reducing the number of etching steps and alignment requirements, while the design ensures adequate electrical characteristics are maintained through proper dimensional control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed structure enhances the electrical characteristics of magnetic memory devices, enabling improved performance in terms of speed and power consumption, thus making them suitable for high-demand electronic applications.
Implementation Method 1
A resistance value of the magnetic tunnel junction pattern may be changed depending on magnetization directions of the two magnetic layers. For example, when the magnetization directions of the two magnetic layers are anti-parallel to each other, the magnetic tunnel junction pattern may have a relatively high resistance value. When the magnetization directions of the two magnetic layers are parallel to each other, the magnetic tunnel junction pattern may have a relatively low resistance value.
Implementation Method 2
The magnetic memory device may write/read data using a difference between the resistance values of the magnetic tunnel junction pattern.
Data Source
AI summary
A magnetic memory device includes a substrate including a cell region and a peripheral circuit region, lower contact plugs on the cell region, data storage structures on the lower contact plugs, and a peripheral interconnection structure on the peripheral circuit region. The peripheral interconnection structure includes a line portion extending in a direction parallel to a top surface of the substrate, and contact portions extending from the line portion toward the substrate. A height of each of the contact portions is less than a height of each of the lower contact plugs.