Magnetic Memory Devices With Recessed Insulating Layer
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Solution Overview
Problem
Current magnetic memory devices face challenges in achieving high integration and low power consumption while maintaining effective electrical characteristics, particularly in the design of magnetic tunnel junctions.
Innovation Solution
The magnetic memory device incorporates a lower interlayer insulating layer with a recessed surface and inclined inner sidewall between magnetic tunnel junction patterns, preventing electrical shorts and enhancing electrical characteristics by directing conductive etching by-products away from the junctions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If magnetic tunnel junction patterns are highly integrated, then device density increases, but electrical shorts between adjacent junctions occur
Solution Approach 1:
The lower interlayer insulating layer is segmented into different height levels, creating a stepped structure with first and second regions at different elevations. This segmentation physically separates adjacent magnetic tunnel junction patterns, preventing electrical shorts while maintaining high integration density.
Solution Approach 2:
The solution transitions from two-dimensional planar isolation to three-dimensional stepped isolation by varying the height of the lower interlayer insulating layer. The first region extends to a first height while the second region extends to a second height, utilizing the vertical dimension to achieve electrical isolation between adjacent junctions.
2Ease of manufacture
If conventional planar insulating layer structure is used, then manufacturing is simple, but electrical characteristics deteriorate due to conductive etching by-products
Solution Approach 1:
The lower interlayer insulating layer is pre-formed with a stepped structure featuring first and second regions at different heights before magnetic tunnel junction pattern formation. This preliminary structural preparation directs conductive etching by-products away from the junctions during subsequent processing, preventing electrical characteristic deterioration.
Solution Approach 2:
The stepped lower interlayer insulating layer acts as an intermediary structure between the substrate and magnetic tunnel junction patterns. The first region at a higher elevation serves as a protective barrier that intercepts and redirects conductive etching by-products, preventing them from reaching and degrading the electrical characteristics of adjacent junctions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design improves the electrical characteristics of magnetic memory devices by preventing electrical shorts and optimizing the structure of magnetic tunnel junctions, leading to higher integration and lower power consumption.
Implementation Method 1
A magnitude of a resistance value of the magnetic tunnel junction pattern may be changed depending on magnetization directions of the two magnetic layers
Data Source
AI summary
A magnetic memory device includes a lower interlayer insulating layer on a substrate, and a plurality of magnetic tunnel junction patterns on the lower interlayer insulating layer and isolated from direct contact with each other in a direction extending parallel to a top surface of the substrate. The lower interlayer insulating layer includes an upper surface including a recessed surface and a top surface, the recessed surface at least partially defining an inner sidewall and a bottom surface of a recess region between adjacent magnetic tunnel junction patterns, such that the recessed surface at least partially defines the recess region. The inner sidewall is inclined at an acute angle with respect to the top surface of the substrate, and the bottom surface has a shape that is convex toward the top surface of the substrate, in direction extending perpendicular to the top surface of the substrate.