Magnetic Memory Cell Segmentation for Resistance Ratio
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Solution Overview
Problem
Existing MRAM memory cells face challenges with low resistance value ratios between low and high resistance states, affecting write and read performance, and are prone to errors, especially under high temperature and after multiple operations, due to limitations in material technology and disturbance.
Innovation Solution
The magnetic memory design includes two magnetic tunnel junction memory cells with different resistance states, transistors, and a sensing amplifier, allowing for improved programming and reading by controlling the resistance states and current flow, thereby enhancing reading accuracy and speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If material technology limitations are accepted, then manufacturing complexity is reduced, but resistance value ratio between low and high resistance states deteriorates
Solution Approach 1:
The patent divides a single memory cell into two separate magnetic tunnel junction memory cells (first and second cells), each independently controlled by separate transistors. This segmentation allows independent optimization of each cell's resistance states, enabling the system to achieve higher effective resistance ratios through differential signaling even when individual cells have limited resistance ratios.
2Reliability
If read voltage is controlled low to avoid disturbance, then reliability is improved, but read current becomes small and reading precision deteriorates
Solution Approach 1:
The patent combines the signals from two magnetic tunnel junction memory cells through a sensing amplifier that reads the potential difference between both cells. By merging the resistance effects of two cells in a differential configuration, the system achieves enhanced signal amplitude that improves reading precision while maintaining low read voltage to avoid disturbance.
Solution Approach 2:
The sensing amplifier acts as an intermediary that converts the small potential differences from individual memory cells into a measurable output signal. This intermediary component amplifies the differential signal from the two memory cells, enabling high-precision reading without requiring high read voltages that would cause disturbance.
3Device complexity
If single memory cell is used, then device complexity is reduced, but reading precision deteriorates due to low resistance ratio
Solution Approach 1:
The patent segments the memory system into two independently controllable magnetic tunnel junction memory cells, each with its own transistor control. This segmentation enables differential reading where the combined signal from both cells provides superior precision compared to a single cell, while the modular structure keeps the increase in device complexity manageable.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design avoids the limitations of low resistance value ratios, improving reading accuracy and speed by allowing distinct resistance states in MRAM memory cells, reducing errors and maintaining performance across various conditions.
Implementation Method 1
MRAM memory cells are manufactured using characteristics of material anisotropic magnetoresistance
Implementation Method 2
reading of the MRAM memory cells is performed by determining 0 and 1 signals according to the potential difference caused by different magnetic resistance
Data Source
AI summary
A magnetic memory and its programming control method and reading method, and a magnetic storage device of the magnetic memory are provided in the present disclosure. The magnetic memory includes a first magnetic tunnel junction memory cell, including a first terminal coupled to a first bit line, and further includes a switch device, including a first terminal coupled to a second terminal of the first magnetic tunnel junction memory cell, and a control terminal connected to a switch control signal. The magnetic memory further includes a second magnetic tunnel junction memory cell, including a first terminal coupled to a second bit line, and a second terminal coupled to a second terminal of the switch device. The magnetic memory further includes a first transistor, a second transistor, and a sensing amplifier.