Magnetic Memory Device Segmented Cell Arrays

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Solution Overview

Problem

Current magnetic memory devices face challenges in achieving high integration density and efficient operation, particularly in high-speed and low-power electronic devices, where existing designs struggle to optimize the arrangement and connectivity of free magnetic patterns and transistors for improved performance.

Innovation Solution

The proposed magnetic memory device incorporates a unique arrangement of free magnetic patterns and transistors, with alternating cell array structures and strategically placed transistor regions, allowing for improved integration density by optimizing the spacing and connectivity of magnetic domains and transistors, enabling efficient movement of magnetic domains for high-speed operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If free magnetic patterns and transistors are arranged in conventional cell array structures, then device functionality is maintained, but integration density is limited

Engineering Contradiction:
Improveintegration densityVSAvoidarrangement complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The device is divided into multiple cell array structures (first, second, third, fourth) with distinct free magnetic pattern arrangements. Each cell array contains specifically configured transistors (first, second, third, fourth transistors per array) that are segmented and positioned to control magnetic domain movement in different regions, enabling higher integration density through systematic division of functional units

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Free magnetic patterns are arranged in alternating directions across different cell arrays. The first and third cell arrays have magnetic patterns extending in a first direction, while the second and fourth cell arrays have magnetic patterns extending in a second direction perpendicular to the first direction. This dimensional alternation optimizes space utilization and increases integration density

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If transistor regions are placed close to magnetic patterns for connectivity, then operational efficiency improves, but spacing and heat management become problematic

Engineering Contradiction:
Improveoperational efficiencyVSAvoidheat management
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

Different transistor regions are positioned at specific locations relative to magnetic patterns based on local functional requirements. First transistors are located adjacent to first magnetic patterns, second transistors adjacent to second magnetic patterns, with additional third and fourth transistors positioned in center regions. This localized positioning optimizes connectivity where needed while maintaining adequate spacing for heat dissipation

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The transistor control function is segmented across multiple transistor types (first, second, third, fourth transistors) distributed throughout the device. Each transistor type controls specific magnetic patterns in its vicinity, distributing the operational load and heat generation across multiple discrete components rather than concentrating it in single regions

Inventive Principle:
Principle #1Segmentation

3Quantity of substance

If magnetic patterns are spaced closely to increase density, then integration density improves, but magnetic domain movement control becomes difficult

Engineering Contradiction:
Improveintegration densityVSAvoidmagnetic domain control
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

Transistors serve as intermediary control elements positioned between closely spaced magnetic patterns. Each transistor (first, second, third, fourth) acts as a mediator that enables precise electrical control of magnetic domain movement in its associated magnetic patterns, maintaining reliable control even when patterns are densely packed

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

Magnetic patterns are arranged in alternating directions (first direction in odd cell arrays, second perpendicular direction in even cell arrays) to create a two-dimensional grid structure. This dimensional arrangement allows patterns to be closely spaced in both directions while maintaining clear separation and control pathways through the alternating orientation

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the integration density and operational efficiency of magnetic memory devices, facilitating high-speed and low-power operations by effectively managing magnetic domain movement and resistance states, thereby improving data storage capabilities.

Implementation Method 1

magnetic memory devices using a movement phenomenon of a magnetic domain wall of a magnetic material

Methodology Applied
Scientific EffectMagnetic domain wall movement: Magnetism

Data Source

PatentUS11456332B2Magnetic memory device
Publication Date: 2022.09.27 SAMSUNG ELECTRONICS CO LTD
  • US11456332B2 patent drawing
  • US11456332B2 patent drawing
  • US11456332B2 patent drawing

AI summary

A magnetic memory device includes a first cell array structure including first and second free magnetic patterns which extend in a first direction parallel to a top surface of a substrate and are spaced apart from each other in a second direction intersecting the first direction, and a second cell array structure including a third free magnetic pattern between the first and second free magnetic patterns and a fourth free magnetic pattern spaced apart from the third free magnetic pattern with the second free magnetic pattern therebetween. The first cell array structure further includes a first transistor region including first transistors connected to the first and second free magnetic patterns. The second cell array structure further includes a second transistor region including second transistors connected to the third and fourth free magnetic patterns. The second transistor region is spaced apart from the first transistor region in the first direction.