Magnetic Memory Array Selector Etching with Wider Mask

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Solution Overview

Problem

The existing manufacturing methods for magnetic memory cells face challenges in reliably producing high-yield devices due to the weak etching resistance of volatile switching layers, which leads to sidewall recession and accumulation of redeposited materials, causing shunting issues during the etching process.

Innovation Solution

The method involves fabricating the selector and magnetic memory element separately and using a distinct etch mask with wider dimensions than the magnetic memory elements to minimize exposure and redeposition, allowing for localized formation of conductive paths in the volatile switching layer, thereby preventing shunting and improving yield.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conventional manufacturing methods are used to fabricate magnetic memory cells, then production can proceed with standard processes, but sidewall recession and accumulation of redeposited materials occur during etching, causing shunting issues and reduced device yield

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoiddevice yield
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent divides the manufacturing process into distinct stages: fabricating the magnetic memory element first, then fabricating the selector separately. This segmentation allows each component to be optimized independently and avoids the sidewall recession problem that occurs when etching through the volatile switching layer in conventional integrated processes.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The magnetic memory element is fabricated in advance before the selector is formed. The etch mask is designed with wider dimensions than the magnetic memory element to provide preliminary protection. This preliminary action ensures that the volatile switching layer is not exposed to etching conditions that would cause sidewall recession.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If the etch mask has the same dimensions as the magnetic memory element, then the process is simpler, but exposure and redeposition of materials occur during etching, causing shunting

Engineering Contradiction:
Improveetch mask designVSAvoidparasitic leakage paths
Core Design Contradiction:
Device complexityVSObject-generated harmful factors

Solution Approach 1:

The etch mask is designed with wider dimensions than the magnetic memory element to provide preliminary protection against etching. This extra width creates a protective barrier that prevents etchant from reaching the sidewalls of the volatile switching layer, thereby counteracting the harmful effect of material redeposition before it can occur.

Inventive Principle:
Principle #9Preliminary anti-action

3Ease of manufacture

If the volatile switching layer is etched with standard processes, then manufacturing is easier, but sidewall recession occurs leading to shunting issues

Engineering Contradiction:
Improveetching process simplicityVSAvoidsidewall integrity
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The wider etch mask serves as a cushioning layer that protects the volatile switching layer from etching damage. By providing this extra protective margin before etching begins, the sidewalls of the volatile switching layer are shielded from recession, maintaining manufacturing precision while still using standard etching processes.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the device yield by reducing parasitic leakage paths and allowing for flexible etching processes, ensuring reliable and efficient production of magnetic memory cells.

Implementation Method 1

When a sufficiently high voltage is applied to the selector 34, however, the volatile switching layer becomes conductive and thus allows current to flow therethrough.

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

The selector 34 is formed on top of the magnetic memory element 36, which is formed on top of the first conductive line 40 (bit or word line). With continuing reference to FIG. 2, the fabrication of the magnetic memory cell 32 begins by depositing all relevant films of the magnetic memory element 36 and the selector 34 on a planarized substrate containing therein the first conductive line 40. The pillar shaped magnetic memory cell 32 is then formed by etching the relevant films with an etch mask 52 thereon.

Methodology Applied
Scientific EffectEtching:

Implementation Method 3

During the etching process, redeposited materials, such as magnetic materials from the MTJ structure 48 and noble metals from the top and bottom electrodes 42 and 44 that cannot be readily volatilized, may accumulate in the circumferential notch, thereby shunting the selector 34.

Methodology Applied
Scientific EffectRedeposition: Deposition (physical)

Implementation Method 4

When a switching current or voltage is applied to the MTJ, the magnetization direction of the magnetic free layer is switched with respect to the magnetization direction of the magnetic reference layer, thereby changing the electrical resistance of the MTJ.

Methodology Applied
Scientific EffectMagnetoresistance: Magnetoresistance

Implementation Method 5

When the magnetization directions of the magnetic free and reference layers are substantially parallel or oriented in a same direction, electrons polarized by the magnetic reference layer can tunnel through the insulating tunnel junction layer, thereby decreasing the electrical resistance of the MTJ.

Methodology Applied
Scientific EffectElectron tunneling:

Data Source

PatentUS11127782B2Magnetic memory array incorporating selectors and method for manufacturing the same
Publication Date: 2021.09.21 AVALANCHE TECHNOLOGY INC
  • US11127782B2 patent drawing
  • US11127782B2 patent drawing
  • US11127782B2 patent drawing

AI summary

The present invention is directed to a memory cell array comprising an array of magnetic memory elements arranged in rows and columns; a plurality of electrodes, each of which is formed adjacent to a respective one of the array of magnetic memory elements; a plurality of first conductive lines, each of which is connected to a respective row of the array of magnetic memory elements along a row direction; and a plurality of composite lines. Each composite line includes a volatile switching layer connected to a respective column of the plurality of electrodes along a column direction; an electrode layer formed adjacent to the volatile switching layer; and a second conductive line formed adjacent to the electrode layer. The dimension of the volatile switching layer may be substantially larger than the size of the magnetic memory element along the row direction.