Magnetic Memory Sidewall Conductor Parasitic Resistance

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Solution Overview

Problem

Magnetic memory devices with a storage layer held between two tunnel barrier layers face challenges in achieving excellent characteristics due to high parasitic resistance, which reduces the magnetoresistive ratio.

Innovation Solution

A manufacturing method involving a first and second stack structure with a sidewall conductive layer formed through ion beam etching, allowing the storage layer to be electrically connected to the cap layer without being limited by parasitic resistance, and a structure where the storage layer is held between two tunnel barrier layers to enhance the MR ratio.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If a storage layer is held between two tunnel barrier layers to enhance perpendicular magnetization anisotropy, then the magnetization anisotropy is improved, but the parasitic resistance increases and the MR ratio decreases

Engineering Contradiction:
Improveperpendicular magnetization anisotropyVSAvoidMR ratio
Core Design Contradiction:
Stability of the object's compositionVSReliability

Solution Approach 1:

The patent divides the magnetic memory structure into separate stack structures (first stack structure with reference layer, second stack structure with storage layer) connected via conductive layers. This segmentation allows each tunnel barrier layer to be optimized independently while maintaining perpendicular magnetization anisotropy, and the conductive layers provide alternative current paths that reduce parasitic resistance impact on the overall MR ratio.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces conductive layers (first conductive layer and second conductive layer) as intermediaries between the stack structures. These conductive layers serve as mediators that facilitate current flow and reduce the impact of parasitic resistance from the tunnel barrier layers, thereby improving the overall MR ratio while preserving the perpendicular magnetization anisotropy enhancement.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Stability of the object's composition

If two tunnel barrier layers are used to hold the storage layer, then the perpendicular magnetization anisotropy is enhanced, but the parasitic resistance becomes high making it difficult to obtain excellent characteristics

Engineering Contradiction:
Improveperpendicular magnetization anisotropyVSAvoidparasitic resistance
Core Design Contradiction:
Stability of the object's compositionVSObject-generated harmful factors

Solution Approach 1:

The patent segments the magnetic memory into separate stack structures with individual tunnel barrier layers. Each tunnel barrier layer can be optimized for perpendicular magnetization anisotropy independently, while the conductive layers connecting these stacks provide low-resistance current paths that bypass the parasitic resistance issue.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Conductive layers are introduced as intermediary elements between the stack structures. These intermediaries provide alternative current flow paths that reduce the impact of parasitic resistance generated by the dual tunnel barrier layer configuration, thereby maintaining excellent device characteristics.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method enables the formation of a magnetic memory device with a large MR ratio and excellent characteristics by reducing parasitic resistance and allowing for efficient current flow between the storage and cap layers.

Implementation Method 1

a sidewall conductive layer formed through ion beam etching

Methodology Applied
Scientific EffectIon beam etching: Ion Beam

Implementation Method 2

A semiconductor integrated circuit device (magnetic memory device) using a magnetoresistive effect element as a memory element has been proposed

Methodology Applied
Scientific EffectMagnetoresistive effect: Magnetoresistance

Data Source

PatentUS9508922B2Magnetic memory device and method of manufacturing the same
Publication Date: 2016.11.29 KIOXIA CORP
  • US9508922B2 patent drawing
  • US9508922B2 patent drawing
  • US9508922B2 patent drawing

AI summary

According to one embodiment, a magnetic memory device includes a first stack structure including a first magnetic layer, and a first nonmagnetic layer provided on the first magnetic layer, a second stack structure including a second magnetic layer provided on the first nonmagnetic layer, a second nonmagnetic layer provided on the second magnetic layer, and a top conductive layer provided on the second nonmagnetic layer, and a sidewall conductive layer provided on a sidewall of the second stack structure.