Magnetic Memory Stack Structure Optimizing Shift Field and MR Ratio
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Solution Overview
Problem
Magnetic memory devices face a challenge in achieving a balance between low magnetization per unit area (Mst) and high magnetoresistive (MR) ratio, as miniaturizing the magnetoresistive effect element increases the shift field, and reducing Mst typically decreases the MR ratio.
Innovation Solution
A magnetic memory device is designed with a stack structure including a first magnetic layer with variable magnetization, a second magnetic layer with fixed magnetization, and a nonmagnetic tunnel barrier layer, where the second magnetic layer contains iron and boron with a semiconductor interlayer, and the tunnel barrier layer is composed of magnesium, silicon, and oxygen with an oxygen deficiency structure, optimizing the layer thickness and composition to achieve low Mst and high MR ratio.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the magnetoresistive effect element is miniaturized, then the device size is reduced, but the shift field increases
Solution Approach 1:
The patent changes the material composition parameters of the reference layer, specifically using a CoFeB alloy with optimized boron concentration (20-30 at%) and controlled thickness (3-5 nm). This parameter optimization reduces the magnetization per unit area (Mst) of the reference layer, which directly reduces the shift field while maintaining the miniaturized device structure
Solution Approach 2:
The patent employs composite material structures including the CoFeB alloy layer combined with MgO tunnel barrier layer, and introduces a semiconductor-containing layer (such as Si or Ge) within the reference layer structure. These composite materials provide both low Mst and high MR ratio, resolving the contradiction between miniaturization and shift field reduction
2Object-affected harmful factors
If Mst is decreased, then the shift field is reduced, but the MR ratio is decreased
Solution Approach 1:
The patent optimizes the thickness parameters of each layer: CoFeB layer (3-5 nm), MgO layer (1-2 nm), and semiconductor layer (0.5-2 nm). These precise parameter controls ensure that Mst is reduced for low shift field while the tunnel barrier properties are maintained for high MR ratio
Solution Approach 2:
The patent introduces a semiconductor-containing layer (Si or Ge) at specific locations within the reference layer structure. This localized modification improves spin scattering suppression at the interface regions while maintaining low overall Mst, thereby achieving both low shift field and high MR ratio
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces the shift field while maintaining a high MR ratio, enabling a magnetic memory device with improved performance by suppressing spin scattering and promoting crystallization of the tunnel barrier layer.
Implementation Method 1
suppressing spin scattering
Implementation Method 2
promoting crystallization of the tunnel barrier layer
Implementation Method 3
magnetoresistive effect element
Data Source
AI summary
According to one embodiment, a magnetic memory device includes a stack structure including a first magnetic layer having a variable magnetization direction, a second magnetic layer having a fixed magnetization direction, and a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer, wherein the second magnetic layer includes a first layer containing iron (Fe) and boron (B), a second layer containing iron (Fe) and boron (B), and a third layer provided between the first layer and the second layer and containing a semiconductor.