Magnetic Tunneling Junction Spacers for Metal Impurity Protection

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing MRAM devices face issues such as high chip area, high cost, high power consumption, limited sensitivity, and susceptibility to temperature variation, which affect their performance and efficiency.

Innovation Solution

The fabrication method involves forming a magnetic tunneling junction (MTJ) stack with specific layers on a substrate, including a pinned layer, barrier layer, and free layer, and using spacers to protect the MTJ from metal impurities generated during etching processes, thereby enhancing device performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional etching processes are used to fabricate MTJ structures, then manufacturing efficiency is improved, but metal impurities are generated that degrade MTJ performance

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidmetal impurities
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

A spacer layer is introduced as an intermediary protective barrier between the etching environment and the MTJ stack. This spacer layer prevents direct contact between metal impurities generated during etching and the sensitive MTJ components, thereby protecting the device while allowing conventional efficient etching processes to continue.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The spacer layer is formed in advance before the etching process begins. This preliminary protective measure ensures that when metal impurities are generated during subsequent etching steps, they are already blocked from reaching the MTJ structure, preventing degradation before it can occur.

Inventive Principle:
Principle #10Preliminary action

2Area of stationary object

If the chip area is reduced to lower cost and power consumption, then device integration is improved, but manufacturing precision becomes more difficult to maintain

Engineering Contradiction:
Improvechip areaVSAvoiddimensional control
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The spacer layer extends in the vertical dimension (thickness direction) to provide protection and dimensional control. By utilizing the vertical dimension rather than only horizontal space, the invention achieves improved manufacturing precision for small-footprint devices without increasing the chip area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The invention changes the parameter of layer thickness by introducing a spacer layer with specifically controlled thickness. This thickness parameter can be precisely controlled during deposition to provide the necessary protection and dimensional control for miniaturized devices, enabling better manufacturing precision in compact chip designs.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method reduces the impact of metal impurities on the MTJ, improving the reliability and efficiency of MRAM devices by preventing direct contact between metal ions and the barrier layer, thus enhancing operational stability and reducing performance degradation.

Implementation Method 1

Magnetoresistance (MR) effect has been known as a kind of effect caused by altering the resistance of a material through variation of outside magnetic field. The physical definition of such effect is defined as a variation in resistance obtained by dividing a difference in resistance under no magnetic interference by the original resistance.

Methodology Applied
Scientific EffectMagnetoresistance (MR) effect: Magnetoresistance

Implementation Method 2

the characterization of utilizing GMR materials to generate different resistance under different magnetized states

Methodology Applied
Scientific EffectGiant Magnetoresistance (GMR) effect: Magnetoresistance

Implementation Method 3

using spacers to protect the MTJ from metal impurities generated during etching processes, thereby enhancing device performance

Methodology Applied
Scientific EffectPhysical barrier protection: Physical Containment

Data Source

PatentUS20250237718A1Semiconductor device and method for fabricating the same
Publication Date: 2025.07.24 UNITED MICROELECTRONICS CORP
  • US20250237718A1 patent drawing
  • US20250237718A1 patent drawing
  • US20250237718A1 patent drawing

AI summary

A method for fabricating semiconductor device includes the steps of first forming a magnetic tunneling junction (MTJ) stack on a substrate, in which the MTJ stack includes a pinned layer on the substrate, a barrier layer on the pinned layer, and a free layer on the barrier layer. Next, a top electrode is formed on the MTJ stack, the top electrode, the free layer, and the barrier layer are removed, a first cap layer is formed on the top electrode, the free layer, and the barrier layer, and the first cap layer and the pinned layer are removed to form a MTJ and a spacer adjacent to the MTJ.