Magnetoresistive Memory Cell Size Reduction and Energy Efficiency
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Solution Overview
Problem
Current dynamic random-access memory (DRAM) faces challenges with scaling down, leading to increased off-state leakage, reduced data-retention time, and high power consumption, while magnetoresistive memory cells, such as STT-MRAM, are larger and more energy-intensive, making them unsuitable for main memory applications due to size and energy consumption issues.
Innovation Solution
A magnetoresistive memory module with a printed circuit board, memory chips, and a memory controller that performs data scrubbing, where each memory chip includes a magnetoresistive element and an access transistor, optimized to match the size of DRAM cells, and uses a reinforcement-learning model for efficient data scrubbing to minimize energy consumption and maintain data reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If DRAM is scaled down to smaller process technologies to meet increasing memory demand, then memory capacity increases, but off-state leakage increases and data-retention time decreases
Solution Approach 1:
The patent replaces the conventional DRAM capacitor-based storage mechanism with a magnetoresistive memory mechanism using magnetic tunnel junctions (MTJs). This substitution eliminates the need for continuous refresh operations by utilizing magnetic states that naturally retain data without power, thereby resolving the data-retention issue while maintaining high density.
Solution Approach 2:
The patent changes the fundamental storage parameter from electrical charge (in DRAM) to magnetic state (in MTJ). By using TMR (tunnel magnetoresistance) effect and controlling magnetization directions through spin-transfer torque, the system achieves non-volatile storage with comparable or smaller cell sizes, improving both capacity and reliability.
2Area of moving object
If magnetoresistive memory cell size is reduced to match DRAM cell area, then density increases, but write energy consumption increases due to larger current requirements
Solution Approach 1:
The patent segments the write current path by introducing separate write word lines (WWL0, WWL1) distinct from read word lines. This segmentation allows independent optimization of write operations, enabling the use of higher currents for writing without affecting read operations, thereby reducing the energy penalty associated with small cell sizes.
Solution Approach 2:
The patent applies different magnetic anisotropy characteristics to different regions of the MTJ structure. By engineering the free layer with specific perpendicular magnetic anisotropy (PMA) and controlling the magnetization switching locally through spin-polarized current, the system achieves efficient writing in small cells without requiring excessive current across the entire device.
3Use of energy by stationary object
If magnetoresistive memory is used as main memory replacement, then power consumption decreases due to non-volatility, but device complexity increases due to additional control mechanisms
Solution Approach 1:
The patent designs the magnetoresistive memory array to serve multiple functions: it can perform both volatile memory operations (fast read/write for active data) and non-volatile storage (retention for inactive data) using the same physical structure. The MTJ array with access transistors and word line control provides unified functionality, reducing overall system complexity compared to hybrid architectures.
Solution Approach 2:
The magnetoresistive memory structure provides self-service through its inherent non-volatile nature. Data is automatically retained without external refresh operations, eliminating the need for complex refresh control logic that would otherwise be required to maintain data integrity in volatile memory systems.
4Reliability
If frequent refresh operations are performed in scaled-down DRAM to maintain data retention, then data reliability is maintained, but power consumption increases
Solution Approach 1:
The patent eliminates the need for periodic refresh operations by using non-volatile magnetoresistive memory. The MTJ structure maintains its magnetic state indefinitely without power, completely removing the periodic refresh action that consumes power in DRAM systems.
Solution Approach 2:
The magnetoresistive memory provides continuous data retention without interruption or refresh cycles. The magnetic state is maintained continuously without power input, ensuring uninterrupted useful action of data storage unlike DRAM which requires continuous refresh cycles to maintain data.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables the use of magnetoresistive memory as a viable main memory option by reducing cell size and energy consumption, improving data reliability through data scrubbing, and enhancing performance and energy efficiency compared to traditional DRAM and STT-MRAM configurations.
Implementation Method 1
Each magnetoresistive memory cell includes a magnetoresistive element and an access transistor that transfers a current to the magnetoresistive element
Implementation Method 2
The other issue with STT-MRAM is that its write process involves physically switching magnetic configuration of a magnetic tunnel junction (MTJ) with a large write current
Data Source
AI summary
A magnetoresistive memory module used as a main memory of a computing device is provided. A plurality of memory chips are mounted on a printed circuit board, and a memory controller performs data scrubbing. Each memory chip includes a plurality of magnetoresistive memory cells. Each magnetoresistive memory cell includes a magnetoresistive element and an access transistor that transfers a current to the magnetoresistive element, and has a size of a cell area that is substantially similar to a size of a DRAM cell area.