Magneto Resistive Memory Cell With Insulating Ferromagnetic Layer
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Solution Overview
Problem
The large-scale integration of SOT magneto resistive memory devices requires improvements in architecture to enhance spin orbit torque efficiency and simplify integration by defining separate write and read current paths.
Innovation Solution
A magneto resistive memory cell architecture that includes a SOT current layer with a first insulating ferromagnetic layer and a second conductive ferromagnetic layer, allowing for increased spin orbit torque and independent write and read paths, with the SOT current layer made of heavy metals or topological insulators and conductive write and read pads for current flow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a magnetic source external to the memory cell is provided to generate a magnetic bias field, then deterministic switching of the cell during write operation is enabled, but the device complexity increases and integration becomes more difficult
Solution Approach 1:
The invention extracts and eliminates the external magnetic bias source from the memory cell structure. The magnetic bias field generation function is removed from the cell architecture, allowing standard CMOS integration without requiring external magnets or complex bias field generation circuits.
Solution Approach 2:
The write word line is designed to serve dual functions: it acts as both the word line for selecting memory cells during read operations and as the current path for writing data during write operations. This eliminates the need for separate write word lines and external magnetic bias sources, simplifying the overall device architecture.
2Productivity
If separate write and read current paths are defined, then spin orbit torque efficiency is enhanced, but the device structure becomes more complex
Solution Approach 1:
The invention segments the current paths by material layer: the write current flows through the heavy metal layer (SOT current path) while the read current flows through the magnetic tunnel junction. This material-based segmentation achieves separate write and read paths without adding structural complexity, as the layers are naturally stacked vertically.
Solution Approach 2:
The invention transitions from planar current paths to vertical stacking by placing the heavy metal layer beneath the magnetic tunnel junction. This dimensional change allows write and read currents to flow in different vertical planes, achieving path separation while maintaining a compact structure.
3Manufacturing precision
If an external magnetic bias field is used for writing, then switching control is improved, but the manufacturing process becomes more complex
Solution Approach 1:
The invention replaces the mechanical/external magnetic bias field system with an electrical current-based writing mechanism. The write word line carries current that generates spin-orbit torque in the heavy metal layer, substituting external magnetic field generation with an integrated electrical control mechanism that is easier to manufacture.
Solution Approach 2:
The invention changes the control parameter from external magnetic field strength to write current magnitude and direction. By controlling the amplitude and polarity of the write current through the heavy metal layer, precise magnetic switching is achieved without requiring external magnetic bias fields, simplifying the manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This architecture achieves high spin-charge conversion efficiency and simplifies integration by allowing for efficient writing and reading without the need for an external magnetic bias field in some configurations, enhancing the reliability and scalability of the memory device.
Implementation Method 1
The current flowing in the SOT current layer generates a spin-orbit torque originating from a spin Hall effect and/or a Rashba effect that aims at changing the magnetization orientation of the free layer 20b
Implementation Method 2
The current flowing in the SOT current layer generates a spin-orbit torque originating from a spin Hall effect and/or a Rashba effect that aims at changing the magnetization orientation of the free layer 20b
Implementation Method 3
The resistance value between the pinned layer 20c and the free layer 20b is dependent on the actual state of the free layer magnetization orientation. When the free layer 20b and the pinned layer 20c have parallel magnetizations, the magnetic tunnel junction presents a relatively lower electric resistance, whereas in the antiparallel magnetizations the magnetic tunnel junction 20 presents a relatively higher electric resistance
Data Source
Figure 1~2
Figure 3a~4
Figure 5~6
AI summary
The invention relates to a magneto resistive memory cell (1) comprising a SOT current layer (3) defining a main plane and a magnetic free layer (2) disposed on the SOT current layer (3), the magnetization direction (M) of the free layer (2) defining a state of the memory cell (1). According to the invention the free layer (2) comprises a first layer (2a) made of insulating ferromagnetic material and a second layer (2b) made of conductive ferromagnetic material, the first layer (2a) being disposed between the SOT current layer (3) and the second layer (2b).