Magnetoresistive Stack SOT Switching for Low Write Current
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Solution Overview
Problem
Current magnetoresistive random access memory (MRAM) devices face challenges in reducing the required write current, which affects memory cell density, cost, and longevity due to high write current demands and potential dielectric layer degradation.
Innovation Solution
The development of magnetoresistive stacks with optimized configurations, including spin-transfer torque (STT) and spin-orbit torque (SOT) mechanisms, where the magnetization direction of the free magnetic region is switched using current pulses, aiming to reduce the critical current required for writing data and enhance the durability of the intermediate dielectric layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional magnetoresistive memory structures are used, then the memory device can store data, but the write current requirement is high causing dielectric layer degradation
Solution Approach 1:
The patent modifies the magnetic stack structure by introducing a synthetic antiferromagnetic layer with specific magnetization orientation and adjusting the composition and thickness of the tunnel barrier layer. These parameter changes enable spin-orbit torque (SOT) switching mechanism which reduces the write current requirement from conventional levels to below 100 µA, thereby reducing dielectric layer degradation and improving device longevity
Solution Approach 2:
The patent employs a composite magnetic stack structure comprising multiple ferromagnetic layers (CoFeB, CoFe), non-magnetic spacer layers (Ru, Ta), and a tunnel barrier layer (MgO). This composite structure enables both TMR effect for high read signal and SOT mechanism for low-current writing, resolving the contradiction between reliability and energy consumption
2Quantity of substance
If higher memory density is achieved, then the memory capacity increases, but the write current density increases causing more dielectric degradation
Solution Approach 1:
The patent replaces the conventional spin-transfer torque (STT) mechanism with spin-orbit torque (SOT) mechanism by introducing a heavy metal layer (Ta) adjacent to the magnetic stack. This substitution allows current to flow in the heavy metal layer rather than through the tunnel barrier, eliminating direct current stress on the dielectric layer while achieving magnetization switching through spin Hall effect, thus enabling high density without increased dielectric degradation
Solution Approach 2:
The heavy metal layer (Ta) acts as an intermediary that converts charge current into spin current via the spin Hall effect. This intermediary mechanism enables the magnetic switching to occur without high current density passing through the tunnel barrier and dielectric layers, thus protecting the dielectric from degradation even as memory density increases
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the write current requirements, enabling higher memory density, lower production costs, and increased longevity of MRAM devices by minimizing dielectric layer degradation.
Implementation Method 1
spin-transfer torque (STT) or spin-orbit torque (SOT) magnetoresistive random access memory (MRAM) devices
Implementation Method 2
spin-transfer torque (STT) or spin-orbit torque (SOT) magnetoresistive random access memory (MRAM) devices
Implementation Method 3
The magnetic state of the magnetoresistive memory stack is determined or read based on the resistance of the stack in response to a read current
Data Source
AI summary
A magnetoresistive device may include multiple magnetic tunnel junction (MTJ) stacks separated from each other by one or more dielectric material layers and electrically conductive vias extending through the one more dielectric material layers. Each MTJ stack may include multiple MTJ bits arranged one on top of another and the electrically conductive vias may be configured to electrically access each MTJ bit of the multiple MTJ stacks.