Mailbox Registers for Dynamic Executable Passing on Heterogeneous Processors

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Solution Overview

Problem

Current interconnect architectures in computing systems face challenges in meeting the increasing demand for high performance and power efficiency, particularly in supporting advanced computing workloads like machine learning and artificial intelligence, where existing protocols limit the ability to dynamically supply application-specific executables to heterogeneous processing units.

Innovation Solution

The implementation of mailbox registers within the configuration space of processing units allows a host processor to pass and execute native binaries on discrete XPU devices, enabling dynamic execution of application-specific code through existing interconnect technologies like PCIe or CXL, thereby leveraging heterogeneous resources more effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If existing interconnect protocols are used to communicate between host processor and XPU devices, then communication is maintained through standardized interfaces, but the ability to dynamically supply application-specific executables to heterogeneous processing units is limited

Engineering Contradiction:
Improveability to dynamically supply application-specific executablesVSAvoidinterconnect protocol complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent introduces mailbox registers as an intermediary mechanism between the host processor and XPU devices. These registers serve as a communication interface that allows the host to pass executables and receive results without requiring complex protocol changes. The mailbox register acts as a mediator that simplifies the interaction while enabling dynamic executable supply to heterogeneous processing units.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The mailbox register mechanism provides a universal interface that can handle multiple functions including passing executables, transferring data, and receiving results across different XPU device types. This multi-functional approach allows the same interconnect protocol to support diverse heterogeneous processing units without requiring device-specific communication mechanisms.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If heterogeneous processing units are deployed to handle advanced computing workloads, then processing capability is enhanced, but the utilization of these resources is underutilized due to protocol limitations

Engineering Contradiction:
Improveprocessing capability for advanced workloadsVSAvoidresource utilization flexibility
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent enables dynamic execution of application-specific code on heterogeneous processing units through the mailbox register mechanism. The host processor can dynamically load and execute different executables on XPU devices based on workload requirements, transforming the system from static to dynamic resource allocation. This allows processing units to adapt their functionality in real-time based on computational needs.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The mailbox register mechanism allows the host processor to preliminarily prepare and pass executables to XPU devices before actual computation is needed. This pre-loading capability ensures that processing units are ready to execute specific algorithms immediately when required, improving resource utilization efficiency for advanced computing workloads.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20230089863A1Executable passing using mailbox registers
Publication Date: 2023.03.23 INTEL CORP
  • US20230089863A1 patent drawing
  • US20230089863A1 patent drawing
  • US20230089863A1 patent drawing

AI summary

A mailbox register is provided in local memory of a processor device, the processor device connected to a host processor device by an interconnect. The processor device accesses the mailbox register to determine that a ready value in the mailbox register identifies that an executable has been written to the mailbox register by the host processor device. The processor device reads the executable from the mailbox register and executes the executable to generate a result. The processor device writes an execution finished value to the mailbox register based on execution of the executable by the processor circuitry, which the host processor device can read to identify that execution of the executable is complete.