Main Amplifier Offset for DRAM Signal Load Balance

Solution Overview

Problem

In semiconductor devices like DRAM, the layout constraints make it difficult to evenly distribute signal conductor loads for control signals between two memory cell arrays when the main amplifier is positioned between them, leading to uneven signal characteristics and reduced operation margins during read/write operations.

Innovation Solution

The main amplifier blocks are alternately offset in the Y-direction between the memory cell arrays to ensure equal signal conductor loads, allowing for uniform signal transmission characteristics and accommodating larger circuit blocks like power supply circuits between them.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the main amplifier is positioned between two memory cell arrays, then signal amplification function is achieved, but signal conductor loads become uneven leading to reduced operation margins

Engineering Contradiction:

Improveoperation marginVSAvoidsignal conductor load balance

Core Design Contradiction:

ReliabilityVSEase of operation

Solution Approach 1:

The main amplifier is positioned asymmetrically between the first and second memory cell arrays, closer to the first memory cell array than to the second memory cell array. This asymmetric positioning compensates for the different signal conductor load conditions of the two memory cell arrays, thereby equalizing the signal characteristics and operation margins for both arrays.

Inventive Principle:

Principle #4Asymmetry

2Area of stationary object

If main amplifier blocks are positioned between memory cell arrays, then signal amplification is provided, but circuit blocks like power supply circuits cannot be adequately accommodated

Engineering Contradiction:

Improvespace for circuit blocksVSAvoidsignal transmission characteristic

Core Design Contradiction:

Area of stationary objectVSReliability

Solution Approach 1:

The memory device is divided into a first memory bank and a second memory bank, each containing respective memory cell arrays and main amplifier blocks. This segmentation allows main amplifier blocks to be strategically positioned in different locations, creating sufficient space to accommodate additional circuit blocks such as power supply circuits while maintaining balanced signal transmission characteristics.

Inventive Principle:

Principle #1Segmentation

3Ease of manufacture

If main amplifier is centered between memory cell arrays, then layout symmetry is achieved, but layout constraints make it difficult to equalize signal conductor loads

Engineering Contradiction:

Improvelayout symmetryVSAvoidsignal conductor load equality

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The main amplifier is positioned asymmetrically between the first and second memory cell arrays, closer to the first memory cell array than to the second memory cell array. This asymmetric positioning compensates for the different signal conductor load conditions of the two memory cell arrays, thereby equalizing the signal characteristics and operation margins for both arrays.

Inventive Principle:

Principle #4Asymmetry

Data Source

PatentUS9443573B2Semiconductor device including main amplifers between memory cell arrays

Publication Date: 2016.09.13 MICRON TECHNOLOGY INC

AI summary

A semiconductor device includes a plurality of main amplifiers provided between memory cell arrays. One of the main amplifiers is disposed closer to one of the memory cell arrays than to the other of memory cell arrays, and the other of the main amplifiers is disposed closer to the other of the memory cell arrays than to the one of the memory cell arrays. Additional apparatus are disclosed.