Main Driver Impedance Calibration Using Dual Comparator Offsets
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Solution Overview
Problem
Semiconductor apparatuses face challenges in precise impedance matching due to external noise and mismatched impedances, requiring effective calibration to ensure accurate signal transmission, which is complicated by variations in process, voltage, and temperature (PVT) changes.
Innovation Solution
A semiconductor apparatus incorporating a calibration circuit with comparators that generate calibration codes based on comparison signals, allowing the main driver to set resistance values for precise impedance matching, including the use of pull-up and pull-down calibration codes and shifted codes to adjust resistance values effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a single calibration code is generated using a comparator with fixed offset, then the calibration process is simple, but the impedance matching precision is insufficient due to PVT variations
Solution Approach 1:
The calibration process is segmented into multiple calibration operations: a first calibration operation generates a first calibration code using a comparator with a first offset, and a second calibration operation generates a second calibration code using the same comparator with a second offset. These multiple segmented calibration results are then combined to produce a final calibration code, thereby improving impedance matching precision without requiring entirely separate calibration circuits for each operation.
Solution Approach 2:
The offset parameter of the comparator is changed between calibration operations. The comparator is configured with a first offset during the first calibration operation and a second offset during the second calibration operation. By varying the offset parameter, the calibration process captures different characteristics of the main driver, enabling more precise impedance matching across PVT variations while reusing the same hardware comparator.
2Reliability
If external reference resistance is used for calibration, then impedance matching can be performed, but the system requires additional external components and increased device complexity
Solution Approach 1:
The calibration circuit performs self-calibration by generating calibration codes through internal comparator operations with different offsets. The calibration circuit uses its own internal resources (the comparator and offset mechanisms) to generate calibration codes that directly characterize the main driver's behavior, eliminating the need for external reference resistance components and reducing system complexity while maintaining calibration reliability.
3Measurement precision
If calibration codes are generated without considering comparator offset variations, then the calibration process is fast, but the calibration accuracy is compromised under varying temperature and voltage conditions
Solution Approach 1:
The calibration circuit performs preliminary calibration actions by executing multiple calibration operations with different offsets and storing the resulting calibration codes. These preliminary calibration results are prepared in advance and then combined to generate the final calibration code. This preliminary action approach ensures that offset variations are accounted for before the actual signal transmission begins, improving calibration accuracy without significantly increasing the time loss during normal operation.
Data Source
AI summary
A semiconductor apparatus includes a calibration circuit and a main driver. The calibration circuit is configured to generate a first calibration code when set to have a positive offset and generate a second calibration code when set to have a negative offset complementary to the positive offset. The main driver is configured to set a resistance value of the main driver based on the first and second calibration codes.