Managed Memory Power-Off Timing for Background Operation Scheduling

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Memory systems are unable to fully utilize the time provided after a power off notification due to unawareness of the duration until power is deactivated, leading to degraded performance from concurrent background operations.

Innovation Solution

The host system provides a power off notification with a time value indicating the duration until power is deactivated, allowing the memory system to plan and perform background operations effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the memory system performs background operations concurrently, then data maintenance operations can be executed, but the performance is degraded due to lack of time awareness

Engineering Contradiction:
Improvebackground operations executionVSAvoidperformance stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The host system provides feedback about the remaining time until power off through a notification mechanism. The memory system uses this feedback to adjust its background operation scheduling, allowing it to execute maintenance tasks without degrading performance when time is limited.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The memory system performs preliminary actions by scheduling background operations in advance based on the time budget provided by the host system. This allows data maintenance to be completed before power off without interfering with critical performance operations.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the memory system executes background operations, then data maintenance is improved, but interruptions occur when power is deactivated

Engineering Contradiction:
Improvedata maintenanceVSAvoidoperation completion time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The memory system executes background operations preliminarily within the time budget before power is deactivated. The host system notifies the memory system of the time remaining, allowing it to complete maintenance tasks in advance and avoid interruptions.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The memory system dynamically adjusts its background operation execution based on the time budget provided by the host system. When time is abundant, more maintenance operations can be executed; when time is limited, the system prioritizes critical operations to avoid interruptions.

Inventive Principle:
Principle #15Dynamics

3Productivity

If the host system provides time information in power off notification, then the memory system can optimize operations, but the notification mechanism becomes more complex

Engineering Contradiction:
Improveoperation optimizationVSAvoidnotification mechanism
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The power off notification mechanism is enhanced to serve multiple functions: it not only signals the intent to power off but also conveys the time budget for background operations. This multi-functional notification allows the memory system to optimize its operations without requiring separate communication protocols.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20260017198A1Advanced power off notification for managed memory
Publication Date: 2026.01.15 MICRON TECHNOLOGY INC
  • US20260017198A1 patent drawing
  • US20260017198A1 patent drawing
  • US20260017198A1 patent drawing

AI summary

Methods, systems, and devices for advanced power off notification for managed memory are described. An apparatus may include a memory array comprising a plurality of memory cells and a controller coupled with the memory array. The controller may be configured to receive a notification indicating a transition from a first state of the memory array to a second state of the memory array. The notification may include a value, the value comprising a plurality of bits and corresponding to a minimum duration remaining until a power supply of the memory array is deactivated. The controller may also execute a plurality of operations according to an order determined based at least in part on a parameter associated with the memory array and receiving the notification comprising the value.