Managed NAND Memory Arbitration for Power Budget Control

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Solution Overview

Problem

Managed NAND memory devices in mobile systems face challenges in balancing power consumption with user experience, as keeping all memory die powered can quickly deplete battery life, and existing methods struggle to efficiently manage power usage while maintaining performance.

Innovation Solution

Implementing arbitration techniques that monitor active and inactive times of memory die, workload tasks, and splitting read/write operations into sub-operations to optimize power usage, allowing for finer power budget management and maximizing user experience within a given power budget.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If all memory die are kept powered to maintain high performance, then user experience and performance are improved, but power consumption increases rapidly depleting battery life

Engineering Contradiction:
Improvememory performanceVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The memory device is divided into multiple independently controllable memory die, allowing selective powering on and off of individual die based on operational needs. The controller manages each die's power state independently, enabling fine-grained power management that maintains performance when needed while reducing consumption during idle periods.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The power management system dynamically adjusts the operational state of memory die based on real-time workload requirements. The controller monitors active vs inactive times and workload tasks, transitioning memory die between powered and unpowered states to balance performance needs with power conservation, adapting the system state flexibly over time.

Inventive Principle:
Principle #15Dynamics

2Use of energy by moving object

If memory die are selectively deactivated to save power, then battery life is extended, but access time and performance may increase

Engineering Contradiction:
Improvepower consumptionVSAvoidaccess time
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The system maintains a queue of buffered commands for each memory die, preparing and ordering operations in advance. When a memory die is deactivated, its queued commands are preserved and executed immediately upon reactivation, minimizing interruption to data access and maintaining responsive performance despite power state changes.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The controller continuously monitors active and inactive times of memory die along with workload task characteristics. This feedback enables intelligent arbitration decisions about which die to activate or deactivate, optimizing the balance between power savings and access performance based on actual operational patterns and command queues.

Inventive Principle:
Principle #23Feedback

3Device complexity

If read/write operations are executed without splitting to maintain simplicity, then device complexity is reduced, but power budget management precision is insufficient

Engineering Contradiction:
Improveoperation management complexityVSAvoidpower budget management precision
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

Each read or write operation is divided into discrete sub-operations with distinct power consumption profiles. The controller identifies and separates these sub-operations, allowing precise tracking and management of power usage for each component. This segmentation enables accurate power budget adherence while maintaining manageable complexity through systematic processing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system changes the parameter resolution from whole operations to sub-operation level, enabling finer-grained power accounting. By analyzing sub-operation characteristics and their individual power impacts, the controller achieves precise power budget management, adjusting operation scheduling and memory die activation based on detailed power consumption data.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11687277B2Arbitration techniques for managed memory
Publication Date: 2023.06.27 MICRON TECHNOLOGY INC
  • US11687277B2 patent drawing
  • US11687277B2 patent drawing
  • US11687277B2 patent drawing

AI summary

Devices and techniques for arbitrating operation of memory devices in a managed NAND memory system to conform the operation to a power budget. In an example, a method can include initiating a first plurality of host-requested NAND memory operations of a first type at a first channel of a memory device for a first interval, and, at the completion of the first interval, performing a second plurality of homogeneous, host-requested NAND memory operations of a second type at the first multiple plane memory die for a second interval.