Management Core Error Cloaking for Continuous Processor Operation
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Solution Overview
Problem
Existing error handling mechanisms in computing devices require the operating system to be involved in every hardware fault, which can be inefficient and disruptive to normal operations.
Innovation Solution
Implementing a management core that independently handles errors from the processor core, cloaking errors from the operating system as needed, and processing them independently to allow the processor core to continue operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the operating system is involved in every hardware fault handling, then error detection and reporting capability is improved, but system performance and operational continuity deteriorate
Solution Approach 1:
The patent divides error handling into two independent segments: a first processing unit that detects and initially processes errors, and a second processing unit (operating system) that handles only critical errors. This segmentation allows the first unit to handle routine errors independently, preventing them from disrupting the second unit's operations and maintaining system performance while still ensuring reliable error detection.
Solution Approach 2:
The first processing unit acts as an intermediary between the hardware error sources and the operating system. It intercepts errors, performs preliminary processing and correction, and only escalates critical errors to the operating system. This intermediary role filters out routine errors before they can impact system performance while maintaining reliable error detection capabilities.
2Reliability
If the operating system is involved in every hardware fault, then comprehensive error monitoring is improved, but operational disruption increases
Solution Approach 1:
The patent segments error monitoring and handling functions between two processing units. The first processing unit maintains comprehensive error monitoring while handling routine errors independently, preventing operational disruption. The second processing unit maintains operational stability by being involved only in critical error scenarios, thus preserving both monitoring capability and operational stability.
Solution Approach 2:
The first processing unit provides self-service error handling for routine errors, correcting and resolving them without requiring operating system intervention. This self-service capability maintains comprehensive error monitoring while preventing operational disruption, as the first unit independently manages its error handling responsibilities.
3Productivity
If errors are processed independently from the processor core, then system performance is improved, but error handling complexity increases
Solution Approach 1:
The patent segments error handling into a dedicated first processing unit that operates independently from the processor core. This segmentation improves system performance by preventing error handling from interfering with core operations, while the modular design of the first processing unit manages the increased complexity through clear functional separation and independent operation.
Data Source
AI summary
The disclosed device includes a processor core and a management core. The management core can intercept error interrupts indicating errors for the processor core. The management core can process the error while the processor core continues operations, and can also cloak the error from an operating system. Various other methods, systems, and computer-readable media are also disclosed.