Mandrel Etch-Rate Stacking for Sub-Resolution Profile Control
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Solution Overview
Problem
Current semiconductor manufacturing processes face challenges in achieving sub-resolution feature sizes due to the limitations of photolithography systems, leading to increased complexity and cost with multiple patterning techniques like SADP-SIT and SAQP-SIT, which require additional processing steps and complexity to pattern layers with features below the optical resolution limit.
Innovation Solution
The method involves forming mandrel layers with varying etch selectivities and composition gradients using atomic layer deposition (ALD) and chemical vapor deposition (CVD) processes, where the mandrel layers are patterned to control the profile shape and reduce tapering, footing, and gouging, and spacers are used as masks to pattern the target layer, allowing for improved etch performance and pattern shape control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple patterning techniques like SADP-SIT and SAQP-SIT are used to achieve sub-resolution features, then the feature size resolution is improved, but the process complexity and manufacturing cost increase
Solution Approach 1:
The mandrel layer is divided into multiple sub-layers (first mandrel layer, second mandrel layer, third mandrel layer) with different etch rates, allowing independent control of different portions of the mandrel profile during etching. This segmentation enables precise profile control without requiring multiple complete patterning cycles.
Solution Approach 2:
Different regions of the mandrel layer are given different etch rates through composition gradients and material variations. The top portion has higher etch rate while the bottom portion has lower etch rate, creating the desired tapered profile locally without affecting the entire structure uniformly.
2Manufacturing precision
If multiple patterning techniques are used to achieve sub-resolution features, then the feature size resolution is improved, but the manufacturing cost increases
Solution Approach 1:
Multiple mandrel layers are combined into a single integrated structure that performs the functions of multiple separate patterning steps. The stacked mandrel layers with different etch rates collectively achieve the profile control that would otherwise require multiple complete SADP-SIT or SAQP-SIT cycles.
Solution Approach 2:
The etch rate parameter is varied through composition gradients and material composition changes within the mandrel layers. By controlling the etch rate parameter differently at different depths and regions, the desired profile is achieved without additional processing steps.
3Device complexity
If conventional photolithography is used for patterning, then the process simplicity is maintained, but the minimum feature size is limited by optical resolution
Solution Approach 1:
The mandrel layers are pre-formed with specific composition gradients and etch rate profiles before the actual patterning etch. This preliminary structuring of the mandrel layers ensures that during the subsequent etch process, the desired profile emerges automatically, achieving sub-resolution features without complex lithography.
Solution Approach 2:
The multi-layer mandrel structure acts as an intermediary between the simple photolithography process and the desired complex sub-resolution pattern. The mandrel layers translate the simple top-down pattern into the complex tapered profile needed for sub-resolution features through their controlled etch rate differences.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of semiconductor structures with improved pattern density and reduced manufacturing costs by enhancing the etch performance and profile control of mandrel layers, resulting in straighter sidewalls and more efficient patterning processes.
Implementation Method 1
forming mandrel layers with varying etch selectivities and composition gradients using atomic layer deposition (ALD)
Implementation Method 2
forming mandrel layers with varying etch selectivities and composition gradients using atomic layer deposition (ALD) and chemical vapor deposition (CVD) processes
Data Source
AI summary
A method of forming a semiconductor structure includes forming a first mandrel layer over a target layer, forming a second mandrel layer over the first mandrel layer, and patterning a mandrel by etching the second mandrel layer and the first mandrel layer. The first mandrel layer has a first etch rate and the second mandrel layer has a second etch rate less than the first etch rate.


