Mandrel Patterning for IC Layout Density and Accuracy
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Solution Overview
Problem
As integrated circuit (IC) technologies progress to smaller nodes, conventional optical lithography technologies struggle with inaccuracies such as rounding, pinching, and bridging, leading to poorly shaped device features, and require significant inactive spaces for printing inaccuracy, which affects device performance and increases manufacturing complexity.
Innovation Solution
The method involves modifying IC design layouts by inserting and adjusting dummy patterns outside layout blocks to improve pattern density, specifically by moving and elongating patterns near corners and edges, and connecting them in lines, to reduce empty spaces and enhance manufacturing accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional optical lithography is used at smaller technology nodes, then manufacturing process simplicity is maintained, but pattern accuracy and device feature quality deteriorate due to resolution limits causing rounding, pinching, and bridging
Solution Approach 1:
The patent applies preliminary action by adding dummy patterns to the layout design before the actual lithography manufacturing process. These dummy patterns are strategically placed around active regions to pre-compensate for optical proximity effects and printing inaccuracies that will occur during lithography, thereby improving pattern accuracy without changing the lithography process itself
Solution Approach 2:
The patent changes the spatial distribution parameters of patterns by introducing dummy patterns with specific densities and arrangements. This modifies the overall pattern density parameters in the layout, which compensates for optical proximity effects and improves the accuracy of printed device features at smaller technology nodes
2Manufacturing precision
If larger inactive spaces are provided between layout blocks to accommodate printing inaccuracy, then pattern accuracy is improved, but space utilization and device density deteriorate
Solution Approach 1:
The patent applies local quality by providing different pattern densities in different regions of the layout. Dummy patterns are added specifically in inactive regions adjacent to active regions where printing inaccuracies occur, while maintaining higher pattern density in active regions. This localized approach improves printing accuracy without requiring uniform increases in inactive space across the entire layout
Solution Approach 2:
The dummy patterns act as intermediary elements between active regions and inactive spaces. They are placed in the inactive regions to serve as a buffer that compensates for printing inaccuracies (such as line end rounding) without requiring large physical gaps between layout blocks, thereby improving printing accuracy while minimizing the loss of usable space
3Manufacturing precision
If pattern density is increased by adding dummy patterns, then manufacturing accuracy is improved, but layout complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the layout into active regions and inactive regions, and further dividing inactive regions into sub-regions based on their proximity to active regions. Dummy patterns are selectively added to specific inactive region sub-regions where they are most needed for improving etching uniformity, rather than uniformly across the entire layout, thus managing complexity while achieving manufacturing precision
Data Source
AI summary
A method that includes receiving an integrated circuit (IC) design layout including a layout block, where the layout block has a corner, adding first patterns along a first edge of the corner, adding second patterns along a second edge of the corner, moving a first column of the first patterns closest to the second edge horizontally toward the second edge, moving a second column of second patterns closest to the second edge horizontally toward the second edge, extending lengths of the first and second patterns in the first and second columns, and outputting a pattern layout in a computer-readable format, where the pattern layout includes the first patterns and the second patterns.