Manganese Conductive Plug Filling for Void-Free Semiconductor Contacts
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Solution Overview
Problem
The manufacturing and integration of semiconductor devices face challenges such as void formation in conductive structures due to difficulties in filling high aspect ratio openings, leading to increased complexity and deficiencies in the manufacturing process.
Innovation Solution
A semiconductor device structure is fabricated with a manganese-containing conductive plug and lining layer, which are integrally formed to reduce manufacturing costs and prevent void formation, thereby decreasing contact resistance and improving device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional filling methods are used for high aspect ratio openings, then manufacturing process complexity increases, but void formation occurs in conductive structures
Solution Approach 1:
The patent combines the lining layer formation and conductive plug filling into a single atomic layer deposition (ALD) process. The lining layer and conductive plug are deposited continuously without breaking vacuum or removing the substrate, eliminating the complexity of separate processing steps while ensuring complete void-free filling of high aspect ratio openings through the conformal nature of ALD deposition
Solution Approach 2:
The patent replaces traditional mechanical filling methods (such as electroplating or physical vapor deposition) with atomic layer deposition (ALD). ALD provides atomic-level control and conformal coverage, enabling precise filling of high aspect ratio openings without the void formation issues that plague conventional mechanical or physical deposition methods
2Reliability
If conventional conductive plugs are formed without lining layers, then manufacturing steps are reduced, but contact resistance increases
Solution Approach 1:
The patent merges the lining layer deposition and conductive plug formation into a single continuous ALD process. The transition from lining layer material to conductive plug material occurs in-situ without breaking vacuum, maintaining the beneficial low contact resistance provided by the lining layer while avoiding the complexity of separate processing steps
Solution Approach 2:
The patent maintains continuous deposition throughout the process, with the ALD process running uninterrupted from lining layer formation through conductive plug filling. This continuity ensures that the lining layer remains intact and provides consistent low contact resistance, while eliminating the vacuum breaks and repositioning operations that would disrupt the process
Data Source
AI summary
A method for fabricating a semiconductor device structure includes forming a first conductive layer over a semiconductor substrate, and forming a dielectric layer over the first conductive layer. The method also includes replacing a portion of the dielectric layer with an energy removable layer, and performing an etching process to form a first opening in the energy removable layer and a second opening in the dielectric layer. The first opening is in a pattern-dense region and the second opening is in a pattern-loose region. The method further includes depositing a lining layer over the energy removable layer and the dielectric layer. The lining layer entirely fills the first opening to form a first conductive plug, and the lining layer partially fills the second opening.