Manycore System Asynchronous Thread Execution

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Solution Overview

Problem

Manycore systems face inefficiencies due to context switching overhead in multi-threading methods, particularly in hardware multithreading where all threads process and end synchronously, leading to reduced processing speed and flexibility.

Innovation Solution

A manycore system design with independent thread contexts and shared hardware resources allows asynchronous execution of threads, enabling context switching without additional cost during pipeline stalls and preventing pipeline stalls by using independent fetch and store units.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If hardware multithreading is used to execute multiple threads concurrently, then processing speed is improved, but all threads must start and end synchronously which reduces flexibility

Engineering Contradiction:
Improveprocessing speedVSAvoidexecution flexibility
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The system dynamically manages thread execution states, allowing threads to be in different phases (active, suspended, completed) simultaneously. The management module can independently control the lifecycle of each thread, enabling some threads to continue execution while others are suspended or completed, thus achieving asynchronous execution with improved flexibility.

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If context switching between threads is implemented, then thread flexibility is improved, but overhead occurs and processing speed is lowered

Engineering Contradiction:
Improvethread flexibilityVSAvoidprocessing speed
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The system segments thread management into independent thread contexts, where each thread has its own context structure. This allows the management module to switch between thread contexts without the overhead of traditional operating system-level context switching, as the context information is organized in a optimized data structure that enables rapid switching.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system uses lightweight context copying mechanisms where thread context information is stored in compact structures that can be rapidly copied and switched. This reduces the overhead associated with context switching compared to traditional operating system approaches.

Inventive Principle:
Principle #26Copying

3Productivity

If multiple threads share execution units, then resource utilization is improved, but pipeline stalls may occur when threads compete for resources

Engineering Contradiction:
Improveresource utilizationVSAvoidpipeline execution continuity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The management module performs preliminary scheduling and resource allocation for threads before execution. It predicts potential resource conflicts and prepares alternative execution paths or schedules threads to avoid conflicts, thereby preventing pipeline stalls before they occur while maintaining high resource utilization.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12131156B1Manycore system for performing execution of multi-threads in asynchronous manner
Publication Date: 2024.10.29 XCENA INC
  • US12131156B1 patent drawing
  • US12131156B1 patent drawing
  • US12131156B1 patent drawing

AI summary

The present disclosure relates to a manycore system capable of asynchronous execution of a plurality of threads. The manycore system includes a device memory configured to store data associated with a job requested to be offloaded from a host device, and a plurality of clusters. Each cluster includes a plurality of cores configured to execute a plurality of threads associated with a plurality of tasks included in the job and a management module configured to control asynchronous execution of the plurality of threads by the plurality of cores. Each core includes a plurality of fetch units configured to fetch, from the program memory, instructions associated with threads executed on the cores, one or more execution units configured to execute operations associated with the threads executed on the cores, and a plurality of load and store units configured to load and store data associated with the threads executed on the cores.