Mapping Cell for High Voltage IO Using Core Devices

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Solution Overview

Problem

The challenge is to replace electrical devices in the IO domain of integrated circuits that operate at higher voltage levels with devices that meet the design rule limitations of the core domain, as newer process nodes make it difficult to manufacture smaller devices capable of handling these higher voltages without overstressing or damaging them.

Innovation Solution

The solution involves using mapping cells composed of multiple core devices that can operate at higher voltage levels, including cascode protection transistors, to replace IO domain electrical devices, ensuring they meet the design rule limitations of the core domain while maintaining comparable power, performance, and area (PPA) characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If electrical devices in the IO domain are designed to operate at higher voltage levels, then power handling capability is improved, but device size increases and manufacturing becomes difficult at newer process nodes

Engineering Contradiction:
Improvepower handling capabilityVSAvoidmanufacturability at newer process nodes
Core Design Contradiction:
PowerVSEase of manufacture

Solution Approach 1:

The patent divides the IO domain electrical device into multiple core domain electrical devices connected in series. Each core device operates at the lower core domain voltage level and is manufactured using standard core domain design rules, while collectively they provide the high voltage handling capability required for IO domain operation. This segmentation resolves the contradiction by allowing manufacturing at newer process nodes while maintaining power handling capability.

Inventive Principle:
Principle #1Segmentation

2Ease of manufacture

If electrical devices in the IO domain are replaced with core domain devices, then manufacturing ease is improved, but voltage handling capability deteriorates

Engineering Contradiction:
Improvemanufacturing easeVSAvoidvoltage handling capability
Core Design Contradiction:
Ease of manufactureVSPower

Solution Approach 1:

The patent combines multiple core domain electrical devices in a series configuration to replace a single IO domain electrical device. The combined structure maintains the voltage handling capability of the original IO domain device while using only core domain devices that are easier to manufacture. The series connection allows voltage stacking, achieving the required voltage handling capability through multiple lower-voltage devices.

Inventive Principle:
Principle #5Merging (Combining)

3Power

If multiple core devices are used to replace IO domain devices, then voltage handling capability is improved, but device complexity increases

Engineering Contradiction:
Improvevoltage handling capabilityVSAvoiddevice complexity
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The patent designs the mapping cell structure to serve multiple functions: the series-connected core devices provide voltage handling capability, while the shared bias circuitry provides both biasing for individual devices and protection functions. This multi-functionality reduces the overall complexity compared to using separate protection circuits for each device, while still achieving the required voltage handling capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20240346217A1Semiconductor structure and method for core-only design
Publication Date: 2024.10.17 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240346217A1 patent drawing
  • US20240346217A1 patent drawing
  • US20240346217A1 patent drawing

AI summary

An integrated circuit includes a core domain having at least one core domain design rule limitation of a smaller device and a lower operating voltage, an input/output domain having at least one input/output domain design rule limitation of a larger device than the smaller device of the core domain and a higher operating voltage than the lower operating voltage of the core domain, and a mapping cell that includes two or more electrical devices that each meet the at least one core domain design rule limitation. The mapping cell is configured to be an input/output device and operate in the input/output domain at the higher operating voltage of the input/output domain.