Mapping Interface for Adjustable Memory Controller Port Widths
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Solution Overview
Problem
Conventional memory controllers in programmable integrated circuits have fixed port widths and directions, limiting their ability to accommodate processing modules with varying data transfer requirements, which restricts flexibility and efficiency in accessing system memory.
Innovation Solution
A mapping interface circuit is introduced to dynamically allocate port resources, allowing for adjustable port widths and directions, enabling the memory controller to support multiple processing modules with different bit widths and data flow protocols.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a conventional memory controller with fixed port widths is used, then the device complexity is reduced and manufacturing is easier, but the adaptability to different processing modules with varying data transfer requirements is limited
Solution Approach 1:
A mapping interface circuit is introduced as an intermediary between the processing modules and the memory controller. This mapping interface includes a mapping module that dynamically allocates port resources and maps processing modules to appropriate memory controller ports based on their data width requirements, thereby enabling the fixed-structure memory controller to accommodate variable port width demands without modifying the memory controller itself
Solution Approach 2:
The memory controller's port resources are segmented into multiple configurable port groups, where each group can be dynamically allocated to different processing modules. The mapping interface divides the memory controller's fixed ports into adjustable configurations, allowing each processing module to access an appropriate subset of ports based on its specific data transfer needs
2Adaptability or versatility
If the memory controller has fixed number of ports, then the device complexity is reduced, but the ability to accommodate multiple processing modules with different port requirements is limited
Solution Approach 1:
The mapping interface implements dynamic port allocation where the number and configuration of accessible ports are not fixed but can be adjusted in real-time based on the requirements of different processing modules. The mapping module dynamically configures which ports are assigned to which processing modules, allowing the system to adapt the port configuration as different modules require different numbers of ports for their operations
3Adaptability or versatility
If the memory controller has fixed directions of data flow, then the device complexity is reduced and manufacturing is easier, but the flexibility to support different data flow protocols is limited
Solution Approach 1:
The mapping interface changes the operational parameters of the memory controller ports dynamically. By configuring the mapping module, the same physical ports can be assigned different data flow directions (read, write, or bidirectional) depending on the requirements of the processing module being served. This parameter change approach allows the fixed hardware to exhibit variable behavior patterns
4Productivity
If port resources are statically allocated, then the device complexity is reduced, but the resource utilization efficiency is limited
Solution Approach 1:
The mapping interface implements a feedback mechanism where the mapping module continuously monitors the requirements of processing modules and dynamically adjusts port allocations accordingly. When processing modules have varying data transfer needs, the mapping module receives feedback about these requirements and reconfigures the port assignments to optimize resource utilization, ensuring that ports are allocated based on actual demand rather than static pre-assignment
Data Source
AI summary
A programmable integrated circuit may have a memory controller that interfaces between master modules and system memory. The memory controller may receive memory access requests from the masters via ports that have predetermined bit widths. To provide the memory controller with adjustable port widths, a mapping interface may be provided that interfaces between master processing modules and the memory controller. The mapping interface may allocate port resources such as read data ports and write data ports of the memory controller to each master processing module. The mapping interface may assign a desirable number of read data ports and write data ports to each master to accommodate the requirements of that master. The mapping interface may assign a command port to each master that receives memory access requests from that master. The mapping interface may convey write acknowledgements in response to fulfilling write access requests.